LMH0026
- Supports SMPTE 259M (C) Serial Digital Video Standard
- Supports 270 Mbps Serial Data Rate Operation
- Supports DVB-ASI at 270 Mbps
- Single 3.3V Supply Operation
- 330 mW Typical Power Consumption
- Two Differential, Reclocked Outputs
- Choice of Second Reclocked Output or Low-Jitter, Differential, Data-Rate Clock Output
- Single 27 MHz External Crystal or Reference Clock Input
- Lock Detect Indicator Output
- Output Mute Function for Data and Clock
- Auto/Manual Reclocker Bypass
- Differential LVPECL Compatible Serial Data Inputs and Outputs
- LVCMOS Control Inputs and Indicator Outputs
- 20-Pin HTSSOP Package
- Industrial Temperature Range: -40°C to +85°C
- Footprint Compatible with the LMH0046 and LMH0346
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The LMH0026 SD SDI Reclocker retimes serial digital video data conforming to the SMPTE 259M (C) standard. The LMH0026 operates at the serial data rate of 270 Mbps and also supports DVB-ASI operation at 270 Mbps.
The LMH0026 retimes the incoming data to suppress accumulated jitter. The LMH0026 recovers the serial data-rate clock and optionally provides it as an output. The LMH0026 has two differential serial data outputs; the second output may be selected as a low-jitter, data-rate clock output. Controls and indicators are: serial clock or second serial data output select, SD indicator output, lock detect output, auto/manual data bypass, and output mute. The serial data inputs, outputs, and serial data-rate clock outputs are differential LVPECL compatible. The CML serial data and serial data-rate clock outputs are suitable for driving 100Ω differentially terminated networks. The control logic inputs and outputs are LVCMOS compatible.
The LMH0026 is powered from a single 3.3V supply. Power dissipation is typically 330 mW. The device is housed in a 20-pin HTSSOP package.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | LMH0026 SD SDI Reclocker with Dual Differential Outputs datasheet (Rev. B) | 2013年 4月 15日 | |
| Selection guide | Broadcast and Professional Video Interface Solutions (Rev. E) | 2017年 4月 5日 | ||
| Application note | AN-1943 Understanding Serial Digital Video Bit Rates (Rev. A) | 2013年 4月 26日 | ||
| Application note | AN-2004 Replacing the CLC016 Reclocker with the LMH0026 (Rev. A) | 2013年 4月 26日 | ||
| Application note | AN-2145 Power Considerations for SDI Products (Rev. B) | 2013年 4月 26日 | ||
| Application note | AN-2146 Power Design for SDI and Other Noise-Sensitive Devices (Rev. A) | 2013年 4月 26日 | ||
| Application note | Replacing the CLC012 Adaptive Cable Equalizer with the LMH0074 (Rev. A) | 2013年 4月 26日 | ||
| Application note | Replacing the CLC014 Adaptive Cable Equalizer with the LMH0074 (Rev. A) | 2013年 4月 26日 | ||
| Application note | High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems | 2009年 11月 12日 | ||
| Application note | Reference Clock Loop Through Application | 2009年 1月 16日 | ||
| Design guide | Broadcast Video Owner's Manual | 2006年 11月 17日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| HTSSOP (PWP) | 20 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點