LMH0034
- SMPTE 292M, SMPTE 344M and SMPTE 259M Compliant
- Supports DVB-ASI at 270 Mbps
- Data Rates: 125 Mbps to 1.485 Gbps
- Equalizes up to 200 Meters of Belden 1694A at 1.485 Gbps or up to 400 Meters of Belden 1694A at 270 Mbps
- Manual Bypass, Cable Length Indicator, and Output Mute with a Programmable Threshold
- Single-Ended or Differential Input
- 50Ω Differential Outputs
- Single 3.3V Supply Operation
- 208 mW Typical Power Consumption with 3.3V Supply
- Replaces the GS1524 and GS1524A
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The LMH0034 SMPTE 292M / 259M adaptive cable equalizer is a monolithic integrated circuit for equalizing data transmitted over cable (or any media with similar dispersive loss characteristics). The equalizer operates over a wide range of data rates from 125 Mbps to 1.485 Gbps and supports SMPTE 292M, SMPTE 344M and SMPTE 259M.
The LMH0034 implements DC restoration to correctly handle pathological data conditions. DC restoration can be bypassed for low data rate applications. The equalizer is flexible in allowing either single-ended or differential input drive.
Additional features include a combined carrier detect and output mute pin which mutes the output when no signal is present. A programmable mute reference is used to mute the output at a selectable level of signal degradation. A cable length indicator is provided to determine the amount of cable being equalized.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | LMH0034 SMPTE 292M / 259M Adaptive Cable Equalizer datasheet (Rev. H) | 2013年 4月 15日 | |
Selection guide | Broadcast and Professional Video Interface Solutions (Rev. E) | 2017年 4月 5日 | ||
Application note | AN-1372 LMH0034 PCB Layout Techniques (Rev. B) | 2013年 4月 26日 | ||
Application note | AN-1943 Understanding Serial Digital Video Bit Rates (Rev. A) | 2013年 4月 26日 | ||
Application note | AN-2145 Power Considerations for SDI Products (Rev. B) | 2013年 4月 26日 | ||
Application note | AN-2146 Power Design for SDI and Other Noise-Sensitive Devices (Rev. A) | 2013年 4月 26日 | ||
User guide | SD034EVK User's Guide | 2012年 6月 27日 | ||
Application note | High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems | 2009年 11月 12日 | ||
Application note | Timing is Everything Çô The Broadcast Video Signal Path | 2007年 8月 2日 | ||
Design guide | Broadcast Video Owner's Manual | 2006年 11月 17日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TIDA-00352 — SDI 視訊聚合參考設計
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (D) | 16 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。