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線性與低壓差 (LDO) 穩壓器

LP2985

現行

具啟用功能的 150-mA、16-V、低壓差電壓穩壓器

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產品規格表

LP2985

現行
產品規格表 立即訂購

產品詳細資料

Output options Fixed Output Iout (max) (A) 0.15 Vin (max) (V) 16 Vin (min) (V) 2.2 Vout (max) (V) 10 Vout (min) (V) 1.8 Fixed output options (V) 1.8, 2.5, 2.8, 2.9, 3, 3.3, 5, 10 Rating Catalog Noise (µVrms) 30 PSRR at 100 KHz (dB) 40 Iq (typ) (mA) 0.065 Thermal resistance θJA (°C/W) 205.4, 206 Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Features Enable Accuracy (%) 5 Dropout voltage (Vdo) (typ) (mV) 280 Operating temperature range (°C) -40 to 125
Output options Fixed Output Iout (max) (A) 0.15 Vin (max) (V) 16 Vin (min) (V) 2.2 Vout (max) (V) 10 Vout (min) (V) 1.8 Fixed output options (V) 1.8, 2.5, 2.8, 2.9, 3, 3.3, 5, 10 Rating Catalog Noise (µVrms) 30 PSRR at 100 KHz (dB) 40 Iq (typ) (mA) 0.065 Thermal resistance θJA (°C/W) 205.4, 206 Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Features Enable Accuracy (%) 5 Dropout voltage (Vdo) (typ) (mV) 280 Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • V IN range (new chip): 2.5 V to 16 V
  • V OUT range (new chip):
    • 1.2 V to 5.0 V (fixed, 100-mV steps)
  • V OUT accuracy:
    • ±1% for A-grade legacy chip
    • ±1.5% for standard-grade legacy chip
    • ±0.5% for new chip only
  • ±1% output accuracy over load, and temperature for new chip
  • Output current: Up to 150 mA
  • Low I Q (new chip): 71 µA at I LOAD = 0 mA
  • Low I Q (new chip): 750 µA at I LOAD = 150 mA
  • Shutdown current:
    • 0.01 µA (typ) for legacy chip
    • 1.12 µA (typ) for new chip
  • Low noise: 30 µV RMS with 10-nF bypass capacitor
  • Output current limiting and thermal protection
  • Stable with 2.2-µF ceramic capacitors
  • High PSRR: 70 dB at 1 kHz, 40 dB at 1 MHz
  • Operating junction temperature: –40°C to +125°C
  • Package: 5-pin SOT-23 (DBV)
  • V IN range (new chip): 2.5 V to 16 V
  • V OUT range (new chip):
    • 1.2 V to 5.0 V (fixed, 100-mV steps)
  • V OUT accuracy:
    • ±1% for A-grade legacy chip
    • ±1.5% for standard-grade legacy chip
    • ±0.5% for new chip only
  • ±1% output accuracy over load, and temperature for new chip
  • Output current: Up to 150 mA
  • Low I Q (new chip): 71 µA at I LOAD = 0 mA
  • Low I Q (new chip): 750 µA at I LOAD = 150 mA
  • Shutdown current:
    • 0.01 µA (typ) for legacy chip
    • 1.12 µA (typ) for new chip
  • Low noise: 30 µV RMS with 10-nF bypass capacitor
  • Output current limiting and thermal protection
  • Stable with 2.2-µF ceramic capacitors
  • High PSRR: 70 dB at 1 kHz, 40 dB at 1 MHz
  • Operating junction temperature: –40°C to +125°C
  • Package: 5-pin SOT-23 (DBV)

The LP2985 is a fixed-output, wide-input, low-noise, low-dropout voltage regulator supporting an input voltage range from 2.5 V to 16 V and up to 150 mA of load current. The LP2985 supports an output range of 1.2 V to 5.0 V (for new chip).

Additionally, the LP2985 (new chip) has a 1% output accuracy across load, and temperature that can meet the needs of low-voltage microcontrollers (MCUs) and processors.

Low output noise of 30 µV RMS (with 10-nF bypass capacitors) and wide bandwidth PSRR performance of greater than 70 dB at 1 kHz and 40 dB at 1 MHz help attenuate the switching frequency of an upstream DC/DC converter and minimize post regulator filtering.

The internal soft-start time and current limit protection reduce inrush current during start up, thus minimizing input capacitance. Standard protection features, such as overcurrent and overtemperature protection, are included.

The LP2985 is available in a 5-pin 2.9-mm × 1.6-mm SOT-23 (DBV) package.

The LP2985 is a fixed-output, wide-input, low-noise, low-dropout voltage regulator supporting an input voltage range from 2.5 V to 16 V and up to 150 mA of load current. The LP2985 supports an output range of 1.2 V to 5.0 V (for new chip).

Additionally, the LP2985 (new chip) has a 1% output accuracy across load, and temperature that can meet the needs of low-voltage microcontrollers (MCUs) and processors.

Low output noise of 30 µV RMS (with 10-nF bypass capacitors) and wide bandwidth PSRR performance of greater than 70 dB at 1 kHz and 40 dB at 1 MHz help attenuate the switching frequency of an upstream DC/DC converter and minimize post regulator filtering.

The internal soft-start time and current limit protection reduce inrush current during start up, thus minimizing input capacitance. Standard protection features, such as overcurrent and overtemperature protection, are included.

The LP2985 is available in a 5-pin 2.9-mm × 1.6-mm SOT-23 (DBV) package.
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類型 標題 日期
* Data sheet LP2985 150-mA, Low-Noise, Low-Dropout Regulator With Shutdown datasheet (Rev. R) PDF | HTML 2023年 7月 10日
Application note LDO Noise Demystified (Rev. B) PDF | HTML 2020年 8月 18日
Application brief 16-Bit 8-Channel PLC Analog Input Module with High Voltage (±150 V) Common Mode 2020年 4月 27日
Application note ESR, Stability, and the LDO Regulator (Rev. A) 2020年 1月 7日
Application note A Topical Index of TI LDO Application Notes (Rev. F) 2019年 6月 27日
Application note Fundamental Theory of PMOS LDO Voltage Regulators (Rev. A) 2018年 8月 17日
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 2017年 8月 9日
Application note A Topical Index of TI Supply Voltage Supervisor (SVS) Application Notes 2015年 6月 15日
Application note Linear power for automated industrial systems 2015年 1月 9日
Analog Design Journal Techniques for accurate PSRR measurements 2013年 10月 28日
Application note AN-1028 Maximum Power Enhancement Techniques for Power Packages (Rev. B) 2013年 5月 6日
Application note AN-1482 LDO Regulator Stability Using Ceramic Output Capacitors (Rev. A) 2013年 4月 25日
Application note AN-1815 LDOs Ease the Stress of Start-Up (Rev. A) 2013年 4月 24日
Application note AN-1950 Silently Powering Low Noise Applications (Rev. A) 2013年 4月 22日
Application note LDO Performance Near Dropout 2010年 10月 8日
Application note 3.6V – 5.5V Input, LDO Reference Design for MSP430 (Rev. A) 2010年 6月 14日
Application note 3.6V – 5.5V Input, LDO with Dual-Level Output Reference Design for MSP430 (Rev. A) 2010年 6月 14日
Application note Packaging Limits Range of Linear Regulators 2010年 5月 8日
Application note Simple Power Solution Using LDOs for the DM365 (Rev. A) 2009年 9月 11日
Application note Digital Designer's Guide to Linear Voltage Regulators & Thermal Mgmt (LDO) (Rev. A) 2008年 6月 4日
Application note Linear and Switching Voltage Regulator Fundamental Part 1 2007年 3月 21日
Application note Ceramic Capacitors Replace Tantalum Capacitors in LDOs (Rev. A) 2006年 10月 13日
Application note Understanding LDO Dropout 2005年 5月 9日
More literature LP2981/85 Product Clip 2004年 9月 9日
Application note Extending the Input Voltage Range of an LDO Regulator 2002年 8月 16日
Application note Understanding the Terms and Definitions of LDO Voltage Regulators 1999年 10月 21日
Application note Technical Review of Low Dropout Voltage Regulator Operation And Performance 1999年 8月 30日
Application brief Low Power 150-mA LDO Linear Regulators. Extended Output Voltage Adjustment Range 1999年 6月 11日

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模擬型號

LP2985-10 PSpice Transient Model

SLVMA21.ZIP (20 KB) - PSpice Model
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模擬型號

LP2985-10 Unencrypted PSpice Transient Model

SNVMB87.ZIP (1 KB) - PSpice Model
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模擬型號

LP2985-18 PSpice Transient Model

SLVMA17.ZIP (20 KB) - PSpice Model
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模擬型號

LP2985-18 Unencrypted PSpice Transient Model

SNVMB86.ZIP (1 KB) - PSpice Model
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模擬型號

LP2985-25 PSpice Transient Model

SLVMA22.ZIP (20 KB) - PSpice Model
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模擬型號

LP2985-25 Unencrypted PSpice Transient Model

SNVMB91.ZIP (1 KB) - PSpice Model
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模擬型號

LP2985-28 PSpice Transient Model

SLVMA20.ZIP (20 KB) - PSpice Model
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模擬型號

LP2985-28 Unencrypted PSpice Transient Model

SNVMB93.ZIP (1 KB) - PSpice Model
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模擬型號

LP2985-29 PSpice Transient Model

SLVMA18.ZIP (20 KB) - PSpice Model
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模擬型號

LP2985-29 Unencrypted PSpice Transient Model

SNVMB90.ZIP (1 KB) - PSpice Model
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模擬型號

LP2985-30 PSpice Transient Model

SLVMA23.ZIP (20 KB) - PSpice Model
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模擬型號

LP2985-30 Unencrypted PSpice Transient Model

SNVMB88.ZIP (1 KB) - PSpice Model
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模擬型號

LP2985-33 PSpice Transient Model

SLVMA24.ZIP (20 KB) - PSpice Model
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模擬型號

LP2985-33 Unencrypted PSpice Transient Model

SNVMB89.ZIP (1 KB) - PSpice Model
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模擬型號

LP2985-50 PSpice Transient Model

SLVMA19.ZIP (20 KB) - PSpice Model
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模擬型號

LP2985-50 Unencrypted PSpice Transient Model

SNVMB92.ZIP (1 KB) - PSpice Model
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參考設計

TIDA-01598 — 適用於太陽能反相器的低壓側、高頻寬電流放大器和故障偵測參考設計

This reference design provides a solution for an accurate shunt-based current measurement on the low side with an integrated fault-detection feature. It consists of a current sense amplifier which supports current sensing for a high bandwidth. The fault detection feature allows detection of (...)
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOT-23 (DBV) 5 Ultra Librarian
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