PCM5102 不建議用於新設計
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PCM5102A 現行 具 32 位元、384kHz PCM 介面的 2VRMS DirectPath™、112dB 音訊立體聲道 DAC Replacement for NRND device

產品詳細資料

Number of DAC channels 2 Analog inputs 0 Analog outputs 2 DAC SNR (typ) (dB) 112 Sampling rate (max) (kHz) 384 Control interface HW Resolution (bps) 32 Architecture Delta Sigma with line driver Operating temperature range (°C) -25 to 85 Rating Catalog
Number of DAC channels 2 Analog inputs 0 Analog outputs 2 DAC SNR (typ) (dB) 112 Sampling rate (max) (kHz) 384 Control interface HW Resolution (bps) 32 Architecture Delta Sigma with line driver Operating temperature range (°C) -25 to 85 Rating Catalog
  • Market-Leading Low Out-of-Band Noise
  • Selectable Digital-Filter Latency and Performance
  • No DC Blocking Capacitors Required
  • Integrated Negative Charge Pump
  • Internal Pop-Free Control For Sample-Rate Changes Or Clock Halts
  • Intelligent Muting System; Soft Up or Down Ramp and Analog Mute
    For 120dB Mute SNR With Popless Operation.
  • Integrated High-Performance Audio PLL With BCK Reference
    To Generate SCK Internally
  • Small 20-pin TSSOP Package
  • Market-Leading Low Out-of-Band Noise
  • Selectable Digital-Filter Latency and Performance
  • No DC Blocking Capacitors Required
  • Integrated Negative Charge Pump
  • Internal Pop-Free Control For Sample-Rate Changes Or Clock Halts
  • Intelligent Muting System; Soft Up or Down Ramp and Analog Mute
    For 120dB Mute SNR With Popless Operation.
  • Integrated High-Performance Audio PLL With BCK Reference
    To Generate SCK Internally
  • Small 20-pin TSSOP Package

The PCM510x devices are a family of monolithic CMOS integrated circuits that include a stereo digital-to-analog converter and additional support circuitry in a small TSSOP package. The PCM510x uses the latest generation of TI’s advanced segment-DAC architecture to achieve excellent dynamic performance and improved tolerance to clock jitter.

The PCM510x provides 2.1VRMS ground centered outputs, allowing designers to eliminate DC blocking capacitors on the output, as well as external muting circuits traditionally associated with single supply line drivers.

The integrated line driver surpasses all other charge-pump based line drivers by supporting loads down to 1kΩ. By supporting loads down to 1kΩ, the PCM510x can essentially drive up to 10 products in parallel, such as an LCD TV, DVDR, AV Receivers and other devices.

The integrated PLL on the device removes the requirement for a system clock (commonly known as master clock), allowing a 3-wire I2S connection and reducing system EMI.

Intelligent clock error and PowerSense under voltage protection utilizes a two level mute system for pop-free performance. Upon clock error or system power failure, the device digitally attenuates the data (or last known good data), then mutes the analog circuit

Compared with existing DAC technology, the PCM510x family offers up to 20dB lower out-of-band noise, reducing EMI and aliasing in downstream amplifiers/ADCs. (from traditional 100kHz OBN measurements all the way to 3MHz)

The PCM510x accepts industry-standard audio data formats with 16- to 32-bit data. Sample rates up to 384kHz are supported.

The PCM510x devices are a family of monolithic CMOS integrated circuits that include a stereo digital-to-analog converter and additional support circuitry in a small TSSOP package. The PCM510x uses the latest generation of TI’s advanced segment-DAC architecture to achieve excellent dynamic performance and improved tolerance to clock jitter.

The PCM510x provides 2.1VRMS ground centered outputs, allowing designers to eliminate DC blocking capacitors on the output, as well as external muting circuits traditionally associated with single supply line drivers.

The integrated line driver surpasses all other charge-pump based line drivers by supporting loads down to 1kΩ. By supporting loads down to 1kΩ, the PCM510x can essentially drive up to 10 products in parallel, such as an LCD TV, DVDR, AV Receivers and other devices.

The integrated PLL on the device removes the requirement for a system clock (commonly known as master clock), allowing a 3-wire I2S connection and reducing system EMI.

Intelligent clock error and PowerSense under voltage protection utilizes a two level mute system for pop-free performance. Upon clock error or system power failure, the device digitally attenuates the data (or last known good data), then mutes the analog circuit

Compared with existing DAC technology, the PCM510x family offers up to 20dB lower out-of-band noise, reducing EMI and aliasing in downstream amplifiers/ADCs. (from traditional 100kHz OBN measurements all the way to 3MHz)

The PCM510x accepts industry-standard audio data formats with 16- to 32-bit data. Sample rates up to 384kHz are supported.

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類型 標題 日期
* Data sheet PCM5100,1,2 Audio Stereo DAC. datasheet (Rev. B) 2012年 4月 25日

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點