產品詳細資料

PGA/VGA PGA Number of channels 1 Vs (min) (V) 4.75 Vs (max) (V) 5.25 BW at Acl (MHz) 650 Acl, min spec gain (V/V) 0.27 Architecture Fully Differential ADC Driver Features Digital Gain Set, Shutdown, Single-ended to Differential conversion Slew rate (typ) (V/µs) 2900 Iq per channel (typ) (mA) 143 Gain (max) (dB) 20 Rating Catalog Operating temperature range (°C) -40 to 85
PGA/VGA PGA Number of channels 1 Vs (min) (V) 4.75 Vs (max) (V) 5.25 BW at Acl (MHz) 650 Acl, min spec gain (V/V) 0.27 Architecture Fully Differential ADC Driver Features Digital Gain Set, Shutdown, Single-ended to Differential conversion Slew rate (typ) (V/µs) 2900 Iq per channel (typ) (mA) 143 Gain (max) (dB) 20 Rating Catalog Operating temperature range (°C) -40 to 85
VQFN (RHD) 28 25 mm² 5 x 5
  • Wideband +5-V Operation: 650-MHz Bandwidth
  • Low Impedance, Voltage Mode Output
  • Wide Gain Range: –11.5 dB to +20 dB
  • Precise 0.5-dB Gain Steps
    Step-to-Step Gain Error = ±0.03 dB
  • HD2: –93 dBc at 100 MHz
  • HD3: –88 dBc at 100 MHz
  • IMD3: –98 dBc at 100 MHz, –95 dBc at 200 MHz
  • OIP3: +47 dBm at 100 MHz;
    Exceeds +45 dBm for Frequencies to 300 MHz
  • Flexible Gain Control Interface:
    • Supports latched and unlatched options
    • Gain may be set in power-down state
    • Fast setup and hold times: 2.5 ns
  • Low Disable Current: 2 mA
  • Pb-Free (RoHS-Compliant) and Green Package
  • APPLICATIONS
    • Programmable Gain IF Amplifier:
      • Differential signal chains
      • Single-ended to differential conversion
    • Fast Gain Control Loops for:
      • Test/measurement
      • Digital radio signal chains
    • ADC Driver for Wireless Base Station Signal Chains: GSM, WCDMA, MC-GSM
    • Radar/Ranging Systems

    PowerPAD is a trademark of Texas Instruments.
    All other trademarks are the property of their respective owners.

  • Wideband +5-V Operation: 650-MHz Bandwidth
  • Low Impedance, Voltage Mode Output
  • Wide Gain Range: –11.5 dB to +20 dB
  • Precise 0.5-dB Gain Steps
    Step-to-Step Gain Error = ±0.03 dB
  • HD2: –93 dBc at 100 MHz
  • HD3: –88 dBc at 100 MHz
  • IMD3: –98 dBc at 100 MHz, –95 dBc at 200 MHz
  • OIP3: +47 dBm at 100 MHz;
    Exceeds +45 dBm for Frequencies to 300 MHz
  • Flexible Gain Control Interface:
    • Supports latched and unlatched options
    • Gain may be set in power-down state
    • Fast setup and hold times: 2.5 ns
  • Low Disable Current: 2 mA
  • Pb-Free (RoHS-Compliant) and Green Package
  • APPLICATIONS
    • Programmable Gain IF Amplifier:
      • Differential signal chains
      • Single-ended to differential conversion
    • Fast Gain Control Loops for:
      • Test/measurement
      • Digital radio signal chains
    • ADC Driver for Wireless Base Station Signal Chains: GSM, WCDMA, MC-GSM
    • Radar/Ranging Systems

    PowerPAD is a trademark of Texas Instruments.
    All other trademarks are the property of their respective owners.

The PGA870 is a wideband programmable-gain amplifier (PGA) for high-speed signal chain and data acquisition systems. The PGA870 has been optimized to provide high bandwidth, low distortion, and low noise, making it ideally suited as a 14-bit analog-to-digital converter (ADC) driver for wireless base station signal chain applications. The wide gain range of –11.5 dB to +20 dB can be adjusted in 0.5-dB gain steps through a 6-bit control word applied to the parallel interface. The gain control interface may be configured as a level-triggered latch or an edge-triggered latch, or it may be placed in an unlatched (transparent) mode. In addition to the 6-bit gain control, the PGA870 contains a power-down pin (PD) that can be used to put the device into a low-current, power-down mode. In this mode, the quiescent current drops to 2 mA, but the gain control circuitry remains active, allowing the gain of the PGA870 to be set before device power-up. The PGA870 is offered in a QFN-28 PowerPAD™ package.

The PGA870 is a wideband programmable-gain amplifier (PGA) for high-speed signal chain and data acquisition systems. The PGA870 has been optimized to provide high bandwidth, low distortion, and low noise, making it ideally suited as a 14-bit analog-to-digital converter (ADC) driver for wireless base station signal chain applications. The wide gain range of –11.5 dB to +20 dB can be adjusted in 0.5-dB gain steps through a 6-bit control word applied to the parallel interface. The gain control interface may be configured as a level-triggered latch or an edge-triggered latch, or it may be placed in an unlatched (transparent) mode. In addition to the 6-bit gain control, the PGA870 contains a power-down pin (PD) that can be used to put the device into a low-current, power-down mode. In this mode, the quiescent current drops to 2 mA, but the gain control circuitry remains active, allowing the gain of the PGA870 to be set before device power-up. The PGA870 is offered in a QFN-28 PowerPAD™ package.

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類型 標題 日期
* Data sheet High-Speed, Fully Differential, Programmable Gain Amplifier datasheet (Rev. A) 2011年 2月 15日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
User guide TSW3725 Evaluation Module 2011年 10月 25日
EVM User's guide PGA870EVM User Guide (Rev. A) 2010年 2月 3日

設計與開發

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開發板

PGA870EVM — PGA870 評估模組

The The PGA870EVM is an evaluation module (EVM) for the PGA870 wideband programmable gain amplifier (PGA) for high-speed signal chain and data acquisition systems.

The PGA870EVM allows for evaluation of all aspects of the PGA870 device. Complete circuit descriptions, schematic diagrams, and a bill (...)

使用指南: PDF
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開發板

TSW3085EVM — 寬頻發射訊號鏈評估板和參考設計

The TSW3085 Evalutaion Module is a circuit board that allows system designers to evaluate the combined performance of Texas Instruments' transmit signal chain with the LMK04806B (formally National Semiconductor) low noise clock generator/jitter cleaner. For ease of use as a complete RF transmit (...)

使用指南: PDF
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模擬型號

PGA870 PSpice Model (Rev. A)

SLOM170A.ZIP (80 KB) - PSpice Model
模擬型號

PGA870 TINA-TI Reference Design

SLOM168.TSC (115 KB) - TINA-TI Reference Design
模擬型號

PGA870 TINA-TI Spice Model

SLOM169.ZIP (65 KB) - TINA-TI Spice Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RHD) 28 Ultra Librarian

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