REG104
- NEW DMOS TOPOLOGY:
Ultra Low Dropout Voltage:
230mV typ at 1A and 3.3V Output
Output Capacitor NOT Required for Stability - FAST TRANSIENT RESPONSE
- VERY LOW NOISE: 33µVRMS
- HIGH ACCURACY: ±2% max
- HIGH EFFICIENCY:
IGND = 1.7mA at IOUT = 1A
Not Enabled: IGND = 0.5µA - 2.5V, 2.7V, 3.0V, 3.3V, 5.0V AND ADJUSTABLE OUTPUT VERSIONS
- THERMAL PROTECTION
- SMALL SURFACE-MOUNT PACKAGES: SOT223-5, DDPAK-5
- APPLICATIONS
- PORTABLE COMMUNICATION DEVICES
- BATTERY-POWERED EQUIPMENT
- MODEMS
- BAR-CODE SCANNERS
- BACKUP POWER SUPPLIES
All trademarks are the property of their respective owners.
The REG104 is a family of low-noise, low-dropout linear regulators with low ground pin current. Its new DMOS topology provides significant improvement over previous designs, including low dropout voltage (only 230mV typ at full load), and better transient performance. In addition, no output capacitor is required for stability, unlike conventional low dropout regulators that are difficult to compensate and require expensive low ESR capacitors greater than 1µF.
Typical ground pin current is only 1.7mA (at IOUT = 1A) and drops to 0.5µA in not enabled mode. Unlike regulators with PNP pass devices, quiescent current remains relatively constant over load variations and under dropout conditions.
The REG104 has very low output noise (typically 33µVRMS for VOUT = 3.3V with CNR = 0.01µF), making it ideal for use in portable communications equipment. On-chip trimming results in high output voltage accuracy. Accuracy is maintained over temperature, line, and load variations. Key parameters are tested over the specified temperature range (–40°C to +85°C).
The REG104 is well protected—internal circuitry provides a current limit which protects the load from damage. Thermal protection circuitry keeps the chip from being damaged by excessive temperature. The REG104 is available in the DDPAK-5 and the SOT223-5.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | DMOS 1A Low-Dropout Regulator datasheet (Rev. G) | 2005年 9月 22日 | |
| Application note | LDO Noise Demystified (Rev. B) | PDF | HTML | 2020年 8月 18日 | |
| Application note | LDO PSRR Measurement Simplified (Rev. A) | PDF | HTML | 2017年 8月 9日 | |
| Application note | Packaging Limits Range of Linear Regulators | 2010年 5月 8日 | ||
| User guide | DEM-SOT223LDO Demonstration Fixture | 2003年 10月 15日 | ||
| User guide | DEM-TO263LDO Demonstration Fixture | 2003年 10月 15日 | ||
| More literature | DMOS Delivers Dramatic Performance Gains to LDO Regulators (EDN mag) | 2001年 2月 14日 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOT-223 (DCQ) | 6 | Ultra Librarian |
| TO-263 (KTT) | 5 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。