SN65C3238
- Auto-powerdown Plus
- Operate With 3-V to 5.5-V VCC Supply
- Always-Active Noninverting Receiver Output (ROUT1B)
- Support Operation From 250 kbit/s to 1 Mbit/s
- Low Standby Current ...1 µA Typical
- External Capacitors ...4 × 0.1 µF
- Accept 5-V Logic Input With 3.3-V Supply
- Inter-Operable With SN65C3243, SN75C3243
- RS-232 Bus-Pin ESD Protection Exceeds ±15-kV Using Human-Body Model (HBM)
- Applications
- Battery-Powered Systems, PDAs, Notebooks, Subnotebooks, Laptops, Palmtop PCs, Hand-Held Equipment, Modems, and Printers
The C3238 devices consist of five line drivers, three line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. In addition, these devices include an always-active noninverting output (ROUT1B), which allows applications using the ring indicator to transmit data while the device is powered down. These devices operate at data signaling rates up to 1 Mbit/s, and at an increased slew-rate range of 24 V/µs to 150 V/µs.
Flexible control options for power management are featured when the serial-port and driver inputs are inactive. The auto-powerdown plus feature functions when FORCEON is low and FORCEOFF\ is high. During this mode of operation, if the device does not sense valid signal transitions on all receiver and driver inputs for 30 s, the built-in charge-pump and drivers are powered down, reducing the supply current to 1 µA. By disconnecting the serial port or placing the peripheral drivers off, auto-powerdown plus will occur if there is no activity in the logic levels for the driver inputs. Auto-powerdown plus can be disabled when FORCEON and FORCEOFF\ are high. With auto-powerdown plus enabled, the device automatically activates once a valid signal is applied to any receiver or driver input. INVALID\ is high (valid data) if any receiver input voltage is greater than 2.7 V or less than 2.7 V or has been between 0.3 V and 0.3 V for less than 30 µs. INVALID\ is low (invalid data) if all receiver input voltages are between 0.3 V and 0.3 V for more than 30 µs. Refer to Figure 5 for receiver input levels.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | SN65C3238, SN75C3238 datasheet (Rev. F) | 2004年 10月 19日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (DW) | 28 | Ultra Librarian |
SSOP (DB) | 28 | Ultra Librarian |
TSSOP (PW) | 28 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點