SN65HVD102
- Configurable CQ Output: Push-Pull, High-Side, or Low-Side for SIO Mode
- Remote Wake-Up Indicator
- Current Limit Indicator
- Power-Good Indicator
- Overtemperature Protection
- Reverse Polarity Protection
- Configurable Current Limits
- 9-V to 36-V Supply Range
- Tolerant to 50-V Peak Line Voltage
- 3.3-V/5-V Configurable Integrated LDO (SN65HVD101 ONLY)
- 20-pin QFN Package, 4 mm × 3.5 mm
The SN65HVD101 and ‘HVD102 IO-Link PHYs implement the IO-Link interface for industrial point-to-point communication. When the device is connected to an IO-Link master through a 3-wire interface, the master can initiate communication and exchange data with the remote node while the SN65HVD10X acts as a complete physical layer for the communication.
The IO-Link driver output (CQ) can be used in push-pull, high-side, or low-side configurations using the EN and TX input pins. The PHY receiver converts the 24-V IO-Link signal on the CQ pin to standard logic levels on the RX pin. A simple parallel interface is used to receive and transmit data and status information between the PHY and the local controller.
The SN65HVD101 and HVD102 implement protection features for overcurrent, overvoltage and overtemperature conditions. The IO-Link driver current limit can be set using an external resistor. If a short-circuit current fault occurs, the driver outputs are internally limited, and the PHY generates an error signal (SC). These devices also implement an overtemperature shutdown feature that protects the device from high-temperature faults.
The SN65HVD102 operates from a single external 3.3-V or 5-V local supply. The SN65HVD101 integrates a linear regulator that generates either 3.3 V or 5 V from the IO-Link L+ voltage for supplying power to the PHY as well as a local controller and additional circuits.
The SN65HVD101 and HVD102 are available in the 20-pin RGB package (4 mm × 3,5 mm QFN) for space-constrained applications.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | SN65HVD10x IO-Link PHY for Device Nodes datasheet (Rev. D) | PDF | HTML | 2017年 5月 12日 |
White paper | Machine Learning Powers Autonomous Industrial Systems (Rev. A) | 2020年 6月 17日 | ||
EVM User's guide | SN65HVD101 EVM User's Guide | 2013年 1月 3日 |
設計與開發
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SN65HVD101EVM — 適用於產品節點 IO-LINK PHY 的 SN65HVD101 和 SN65HVD102 評估模組
The SN65HVD101 and SN65HVD102 IO-LINK PHYs implement the IO-LINK interface for industrial point-to-point communication. When the device is connected to an IO-Link master through a 3-wire interface, the master can initiate communication and exchange data with the remote node while the SN65HVD10X (...)
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封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
VQFN (RGB) | 20 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。