SN74BCT25244
- State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
- ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Designed to Facilitate Incident-Wave Switching for Line Impedances of 25
or Greater
- Distributed VCC and GND Pins Minimize Noise Generated by the Simultaneous Switching of Outputs
- Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic and Ceramic 300-mil DIPs (JT, NT)
These 25- octal buffers
and line drivers are designed specifically to improve both the
performance and density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and transmitters.
These buffers are capable of sinking 188-mA IOL, which
facilitates switching 25-
transmission lines on the incident wave. The distributed
VCC and GND pins minimize switching noise for more
reliable system operation.
When the output-enable (1 and
2
) inputs are
low, the device transmits data from the A inputs to the Y outputs.
When 1
and 2
are high, the outputs are in the
high-impedance state.
The SN54BCT25244 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT25244 is characterized for operation from 0°C to 70°C.
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- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點