SN74HCT646

Name: SN74HCT646
Brand: TI
SKU: SN74HCT646
Price: 0.593 USD

現行

具有 3 態輸出的八路匯流排收發器和暫存器

立即訂購

產品規格表

document-pdfAcrobat SN54HCT646, SN74HCT646 datasheet (Rev. C) (英文)

SN74HCT646

現行

產品規格表

立即訂購

產品詳細資料

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Number of channels

8

IOL (max) (mA)

6

IOH (max) (mA)

-6

Input type

TTL

Output type

CMOS

Features

Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode

Technology family

HCT

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Number of channels

8

IOL (max) (mA)

6

IOH (max) (mA)

-6

Input type

TTL

Output type

CMOS

Features

Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode

Technology family

HCT

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Operating Voltage Range of 4.5 V to 5.5 V
Low Power Consumption, 80-µA Max I_CC
Typical t_pd = 12 ns
±6-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Inputs Are TTL-Voltage Compatible
Independent Registers for A and B Buses
Multiplexed Real-Time and Stored Data
True Data Paths
High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads

Operating Voltage Range of 4.5 V to 5.5 V
Low Power Consumption, 80-µA Max I_CC
Typical t_pd = 12 ns
±6-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Inputs Are TTL-Voltage Compatible
Independent Registers for A and B Buses
Multiplexed Real-Time and Stored Data
True Data Paths
High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads

The ’HCT646 devices consist of bus-transceiver circuits with 3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’HCT646 devices.

Output-enable (OE)\ and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at the high-impedance port can be stored in either or both registers.

The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR determines which bus receives data when OE\ is active (low). In the isolation mode (OE\ high), A data can be stored in one register and/or B data can be stored in the other register.

When an output function is disabled, the input function still is enabled and can be used to store data. Only one of the two buses, A or B, can be driven at a time.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The ’HCT646 devices consist of bus-transceiver circuits with 3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’HCT646 devices.

Output-enable (OE)\ and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at the high-impedance port can be stored in either or both registers.

The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR determines which bus receives data when OE\ is active (low). In the isolation mode (OE\ high), A data can be stored in one register and/or B data can be stored in the other register.

When an output function is disabled, the input function still is enabled and can be used to store data. Only one of the two buses, A or B, can be driven at a time.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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