產品詳細資料

Technology family LVxT Number of channels 4 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) -8 IOL (max) (mA) 8 Features Over-voltage tolerant inputs, Single supply, Voltage translation Input type Schmitt-Trigger Output type Balanced CMOS, Push-Pull Operating temperature range (°C) -55 to 125
Technology family LVxT Number of channels 4 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) -8 IOL (max) (mA) 8 Features Over-voltage tolerant inputs, Single supply, Voltage translation Input type Schmitt-Trigger Output type Balanced CMOS, Push-Pull Operating temperature range (°C) -55 to 125
TSSOP (PW) 14 32 mm² 5 x 6.4
  • Wide operating range of 1.8 V to 5.5 V
  • Single-supply voltage translator (refer to LVxT Enhanced Input Voltage):

    • Up translation:

      • 1.2 V to 1.8 V

      • 1.5 V to 2.5 V

      • 1.8 V to 3.3 V

      • 3.3 V to 5.0 V

    • Down translation:

      • 5.0 V, 3.3 V, 2.5 V to 1.8 V
      • 5.0 V, 3.3 V to 2.5 V
      • 5.0 V to 3.3 V
  • 5.5-V tolerant input pins
  • Supports standard pinouts
  • Up to 150 Mbps with 5-V or 3.3-V V CC
  • Latch-up performance exceeds 250 mA per JESD 17
  • Supports defense, aerospace, and medical applications:
    • Controlled baseline
    • One assembly and test site
    • One fabrication site
    • Extended product life cycle
    • Product traceability
  • Wide operating range of 1.8 V to 5.5 V
  • Single-supply voltage translator (refer to LVxT Enhanced Input Voltage):

    • Up translation:

      • 1.2 V to 1.8 V

      • 1.5 V to 2.5 V

      • 1.8 V to 3.3 V

      • 3.3 V to 5.0 V

    • Down translation:

      • 5.0 V, 3.3 V, 2.5 V to 1.8 V
      • 5.0 V, 3.3 V to 2.5 V
      • 5.0 V to 3.3 V
  • 5.5-V tolerant input pins
  • Supports standard pinouts
  • Up to 150 Mbps with 5-V or 3.3-V V CC
  • Latch-up performance exceeds 250 mA per JESD 17
  • Supports defense, aerospace, and medical applications:
    • Controlled baseline
    • One assembly and test site
    • One fabrication site
    • Extended product life cycle
    • Product traceability

The SN74LV3T98-EP device features configurable multiple functions with extended voltage operation to allow for level translation.. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and noninverter. The output level is referenced to the supply voltage (V CC) and supports 1.2-V, 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.

The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). Additionally, the 5-V tolerant input pins enable down translation (for example 3.3 V to 2.5 V output).

The SN74LV3T98-EP device features configurable multiple functions with extended voltage operation to allow for level translation.. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and noninverter. The output level is referenced to the supply voltage (V CC) and supports 1.2-V, 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.

The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). Additionally, the 5-V tolerant input pins enable down translation (for example 3.3 V to 2.5 V output).

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類型 標題 日期
* Data sheet SN74LV3T98-EPEnhanced Product Configurable Multiple-Function Gate datasheet PDF | HTML 2023年 11月 15日
* Radiation & reliability report SN74LV3T98-EP Enhanced Product Qualification and Reliability Report PDF | HTML 2023年 12月 6日

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