SN74LVC162244A

Name: SN74LVC162244A
Brand: TI
SKU: SN74LVC162244A
Price: 0.74 USD

現行

具有 3 態輸出的 16 通道 1.65-V 至 3.6-V 緩衝器

立即訂購

產品規格表

document-pdfAcrobat SN74LVC162244A 16-Bit Buffer/Driver with 3-State Outputs datasheet (Rev. B) (英文) PDF | HTML

SN74LVC162244A

現行

產品規格表

立即訂購

產品詳細資料

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

3.6

Number of channels

IOL (max) (mA)

Supply current (max) (µA)

IOH (max) (mA)

-12

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Damping resistors, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

3.6

Number of channels

IOL (max) (mA)

Supply current (max) (µA)

IOH (max) (mA)

-12

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Damping resistors, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

SSOP (DL)

164.358 mm² 15.88 x 10.35

TSSOP (DGG)

101.25 mm² 12.5 x 8.1

TVSOP (DGV)

62.08 mm² 9.7 x 6.4

Member of the Texas Instruments Widebus Family
Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max t_pd of 4.4 ns at 3.3 V
Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
> 2 V at V_CC = 3.3 V, T_A = 25°C
Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V V_CC)
Output Ports Have Equivalent 26 Ω Series Resistors, So No External Resistors Are Required
I_off Supports Live Insertion, Partial Power Down Mode, and Back Drive Protection
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 1000-V Charged-Device Model (C101)

Member of the Texas Instruments Widebus Family
Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max t_pd of 4.4 ns at 3.3 V
Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
> 2 V at V_CC = 3.3 V, T_A = 25°C
Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V V_CC)
Output Ports Have Equivalent 26 Ω Series Resistors, So No External Resistors Are Required
I_off Supports Live Insertion, Partial Power Down Mode, and Back Drive Protection
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 1000-V Charged-Device Model (C101)

This 16-bit buffer or driver is designed for 1.65-V to 3.6-V V_CC operation. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer.

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	類型	標題		日期
*	Data sheet	SN74LVC162244A 16-Bit Buffer/Driver with 3-State Outputs datasheet (Rev. B)	PDF \| HTML	2014年 6月 5日
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)		2021年 7月 26日
	Selection guide	Little Logic Guide 2018 (Rev. G)		2018年 7月 6日
	Selection guide	Logic Guide (Rev. AB)		2017年 6月 12日
	Application note	How to Select Little Logic (Rev. A)		2016年 7月 26日
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		2015年 12月 2日
	User guide	LOGIC Pocket Data Book (Rev. B)		2007年 1月 16日
	Product overview	Design Summary for WCSP Little Logic (Rev. B)		2004年 11月 4日
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		2004年 7月 8日
	Application note	Selecting the Right Level Translation Solution (Rev. A)		2004年 6月 22日
	User guide	Signal Switch Data Book (Rev. A)		2003年 11月 14日
	Application note	Use of the CMOS Unbuffered Inverter in Oscillator Circuits		2003年 11月 6日
	User guide	LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)		2002年 12月 18日
	Application note	Texas Instruments Little Logic Application Report		2002年 11月 1日
	Application note	TI IBIS File Creation, Validation, and Distribution Processes		2002年 8月 29日
	More literature	Standard Linear & Logic for PCs, Servers & Motherboards		2002年 6月 13日
	Application note	16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)		2002年 5月 22日
	Application note	Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices		2002年 5月 10日
	More literature	STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS		2002年 3月 27日
	Application note	Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices		1997年 12月 1日
	Application note	Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)		1997年 8月 1日
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)		1997年 6月 1日
	Application note	LVC Characterization Information		1996年 12月 1日
	Application note	Input and Output Characteristics of Digital Integrated Circuits		1996年 10月 1日
	Application note	Live Insertion		1996年 10月 1日
	Design guide	Low-Voltage Logic (LVC) Designer's Guide		1996年 9月 1日
	Application note	Understanding Advanced Bus-Interface Products Design Guide		1996年 5月 1日