SN74LVC240A

Name: SN74LVC240A
Brand: TI
SKU: SN74LVC240A
Price: 0.178 USD

現行

具有 3 態輸出的 8 通道 1.65-V 至 3.6-V 逆變器

立即訂購

產品規格表

document-pdfAcrobat SN74LVC240A Octal Buffer/Driver with 3-State Outputs datasheet (Rev. L) (英文) PDF | HTML

SN74LVC240A

現行

產品規格表

立即訂購

產品詳細資料

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

3.6

Number of channels

IOL (max) (mA)

IOH (max) (mA)

-24

Supply current (max) (µA)

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

3.6

Number of channels

IOL (max) (mA)

IOH (max) (mA)

-24

Supply current (max) (µA)

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

SOIC (DW)

131.84 mm² 12.8 x 10.3

98.28 mm² 12.6 x 7.8

56.16 mm² 7.2 x 7.8

41.6 mm² 6.5 x 6.4

32 mm² 5 x 6.4

Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max t_pd of 6.5 ns at 3.3 V
Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
>2 V at V_CC = 3.3 V, T_A = 25°C
Supports Mixed-Mode Signal Operation
on All Ports (5-V Input/Output Voltage With
3.3-V V_CC)
I_off Supports Live Insertion, Partial-Power-
Down Mode, and Back-Drive Protection
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max t_pd of 6.5 ns at 3.3 V
Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
>2 V at V_CC = 3.3 V, T_A = 25°C
Supports Mixed-Mode Signal Operation
on All Ports (5-V Input/Output Voltage With
3.3-V V_CC)
I_off Supports Live Insertion, Partial-Power-
Down Mode, and Back-Drive Protection
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

This octal buffer/driver is designed for 1.65-V to 3.6-V V_CC operation.

The SN74LVC240A is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

This octal buffer/driver is designed for 1.65-V to 3.6-V V_CC operation.

The SN74LVC240A is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

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SN74AUC240

現行

具有 3 態輸出的 8 通道、0.8-V 至 2.7-V 高速逆變器 Smaller voltage range (0.8V to 2.7V), shorter average propagation delay (1.7ns)

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	類型	標題		日期
*	Data sheet	SN74LVC240A Octal Buffer/Driver with 3-State Outputs datasheet (Rev. L)	PDF \| HTML	2014年 5月 5日
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)		2021年 7月 26日
	Selection guide	Little Logic Guide 2018 (Rev. G)		2018年 7月 6日
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	Application note	How to Select Little Logic (Rev. A)		2016年 7月 26日
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		2015年 12月 2日
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	Application note	Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices		1997年 12月 1日
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