SN75ALS160
- Suitable for IEEE Standard 488-1978 (GPIB)
- 8-Channel Bidirectional Transceivers
- High-Speed Advanced Low-Power Schottky (ALS) Circuitry
- Low Power Dissipation . . . 46 mW Max Per Channel
- Fast Propagation Times . . . 20 ns Max
- High-Impedance pnp Inputs
- Receiver Hysteresis . . . 650 mV Typ
- Open-Collector Driver Output Option
- No Loading of Bus When Device Is Powered Down (VCC = 0)
- Power-Up/Power-Down Protection (Glitch Free)
The SN75ALS160 eight-channel general-purpose interface bus transceivers are monolithic, high-speed, advanced low-power Schottky (ALS) devices designed for two-way data communications over single-ended transmission lines. This device is designed to meet the requirements of IEEE Standard 488-1978. The transceivers feature driver outputs that can be operated in either the passive-pullup or 3-state mode. If talk enable (TE) is high, these ports have the characteristics of passive-pullup outputs when pullup enable (PE) is low and of 3-state outputs when PE is high. Taking TE low places these ports in the high-impedance state. The driver outputs are designed to handle loads up to 48 mA of sink current.
An active turn-off feature has been incorporated into the bus-terminating resistors so that the device exhibits a high impedance to the bus when VCC = 0. When combined with the SN75ALS161 or SN75ALS162 bus management transceiver, the pair provides the complete 16-wire interface for the IEEE-488 bus.
The SN75ALS160 is characterized for operation from 0°C to 70°C.
您可能會感興趣的類似產品
功能與所比較的裝置相似
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | SN75ALS160 datasheet (Rev. E) | 2004年 6月 28日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
PDIP (N) | 20 | Ultra Librarian |
SOIC (DW) | 20 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。