THS1206
- High-Speed 6 MSPS ADC
- 4 Analog Inputs
- Simultaneous Sampling of 4 Single-Ended Signals or 2 Differential Signals or Combination of Both
- Differential Nonlinearity Error: ±1 LSB
- Integral Nonlinearity Error: ±1.5 LSB
- Signal-to-Noise and Distortion Ratio: 68 dB at fI = 2 MHz
- Auto-Scan Mode for 2, 3, or 4 Inputs
- 3-V or 5-V Digital Interface Compatible
- Low Power: 216 mW Max
- 5-V Analog Single Supply Operation
- Internal Voltage References ...50 PPM/°C and ±5% Accuracy
- Glueless DSP Interface
- Parallel µC/DSP Interface
- Integrated FIFO
- Available in TSSOP Package
- Pin Compatible Upgrade to THS10064
- APPLICATIONS
- Radar Applications
- Communications
- Control Applications
- High-Speed DSP Front-End
- Automotive Applications
The THS1206 is a CMOS, low-power, 12-bit, 6 MSPS analog-to-digital converter (ADC). The speed, resolution, bandwidth, and single-supply operation are suited for applications in radar, imaging, high-speed acquisition, and communications. A multistage pipelined architecture with output error correction logic provides for no missing codes over the full operating temperature range. Internal control registers are used to program the ADC into the desired mode. The THS1206 consists of four analog inputs, which are sampled simultaneously. These inputs can be selected individually and configured to single-ended or differential inputs. An integrated 16 word deep FIFO allows the storage of data in order to take the load off of the processor connected to the ADC. Internal reference voltages for the ADC (1.5 V and 3.5 V) are provided.
An external reference can also be chosen to suit the dc accuracy and temperature drift requirements of the application. Two different conversion modes can be selected. In single conversion mode, a single and simultaneous conversion of up to four inputs can be initiated by using the single conversion start signal (CONVST)\. The conversion clock in single conversion mode is generated internally using a clock oscillator circuit. In continuous conversion mode, an external clock signal is applied to the CONV_CLK input of the THS1206. The internal clock oscillator is switched off in continuous conversion mode.
The THS1206C is characterized for operation from 0°C to 70°C, the THS1206I is characterized for operation from 40°C to 85°C, the THS1206Q is characterized to meet the rigorous requirements of the automotive environment from 40°C to 125°C, and the THS1206M is characterized for operation over the full military temperature range of 55°C to 125°C.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | THS1206: 12-Bit, 6 MSPS, Simultaneous Sampling Analog-to-Digital Converter datasheet (Rev. H) | 2003年 6月 27日 | |
Analog Design Journal | Synchronizing non-FIFO variations of the THS1206 | 2005年 2月 28日 | ||
Application note | Noise Analysis for High Speed Op Amps (Rev. A) | 2005年 1月 17日 | ||
EVM User's guide | Modular THS1206EVM User's Guide | 2003年 12月 11日 | ||
Application note | Resetting Non-FIFO Variations of the 12-bit THS1206 | 2002年 5月 9日 | ||
User guide | THS1206, THS12082. THS10064, THS10082 Evaluation Module (Rev. B) | 2001年 1月 9日 | ||
More literature | THS1206M / 5962-9957701NXD | 2000年 4月 26日 | ||
Application note | Designing with the THS1206 High-Speed Data Converter | 2000年 4月 4日 |
設計與開發
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THS1206M-EVM — THS1206M 評估模組
This EVM can accommodate all eight devices of the THS1206 family of data converters. This family consists of high-speed, low power, 10 and 12-bit ADCs that operate from independent 5V, Avdd, and 3.0-5.25V, DVdd, supplies. Independent buffer supply, BVdd, eliminates the need for level-shifting (...)
ANALOG-ENGINEER-CALC — 類比工程師計算機
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
TSSOP (DA) | 32 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。