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TL974

現行

四路、12-V、12-MHz 運算放大器

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TLV9164 現行 四通路、16-V、11-MHz、軌對軌輸入和輸出低偏移電壓運算放大器 Rail-to-Rail input and output, wider voltage range (2.7 V to 16 V), higher slew rate (33 V/us), lower offset voltage (1 mV), and improved offset voltage drift

TL974

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.7 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 12 GBW (typ) (MHz) 12 Slew rate (typ) (V/µs) 5 Rail-to-rail Out Vos (offset voltage at 25°C) (max) (mV) 4 Iq per channel (typ) (mA) 2 Vn at 1 kHz (typ) (nV√Hz) 4 THD + N at 1 kHz (typ) (%) 0.003 Rating Catalog Operating temperature range (°C) -40 to 125 Iout (typ) (A) 0.0014 Architecture Bipolar CMRR (typ) (dB) 85 Input bias current (max) (pA) 750000
Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.7 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 12 GBW (typ) (MHz) 12 Slew rate (typ) (V/µs) 5 Rail-to-rail Out Vos (offset voltage at 25°C) (max) (mV) 4 Iq per channel (typ) (mA) 2 Vn at 1 kHz (typ) (nV√Hz) 4 THD + N at 1 kHz (typ) (%) 0.003 Rating Catalog Operating temperature range (°C) -40 to 125 Iout (typ) (A) 0.0014 Architecture Bipolar CMRR (typ) (dB) 85 Input bias current (max) (pA) 750000
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOIC (D) 14 51.9 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4
  • Rail-to-Rail Output Voltage Swing:
    ±2.4 V at VCC = ±2.5 V
  • Very Low Noise Level: 4 nV/√Hz
  • Ultra-Low Distortion: 0.003%
  • High Dynamic Features: 12 MHz, 5 V/µs
  • Operating Range: 2.7 V to 12 V
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
    • 1500-V Charged-Device Model
  • Rail-to-Rail Output Voltage Swing:
    ±2.4 V at VCC = ±2.5 V
  • Very Low Noise Level: 4 nV/√Hz
  • Ultra-Low Distortion: 0.003%
  • High Dynamic Features: 12 MHz, 5 V/µs
  • Operating Range: 2.7 V to 12 V
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
    • 1500-V Charged-Device Model

The TL97x family of single, dual, and quad operational amplifiers operates at voltages as low as ±1.35 V and features output rail-to-rail signal swing. The TL97x boast characteristics that make them particularly well suited for portable and battery-supplied equipment. Very low noise and low distortion characteristics make them ideal for audio preamplification.

The TL971 is housed in the space-saving 5-pin SOT-23 package, which simplifies board design because of the ability to be placed anywhere (outside dimensions are 2.8 mm × 2.9 mm).

The TL97x family of single, dual, and quad operational amplifiers operates at voltages as low as ±1.35 V and features output rail-to-rail signal swing. The TL97x boast characteristics that make them particularly well suited for portable and battery-supplied equipment. Very low noise and low distortion characteristics make them ideal for audio preamplification.

The TL971 is housed in the space-saving 5-pin SOT-23 package, which simplifies board design because of the ability to be placed anywhere (outside dimensions are 2.8 mm × 2.9 mm).
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* Data sheet TL97x Output Rail-To-Rail Very-Low-Noise Operational Amplifiers datasheet (Rev. H) PDF | HTML 2015年 1月 25日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

AMP-PDK-EVM — 放大器性能開發套件評估模組

放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件，可測試通用運算放大器 (op amp) 參數，並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項，可滿足封裝需求，使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝，包括：

  • D (SOIC-8 和 SOIC-14)
  • PW (TSSOP-14)
  • DGK (VSSOP-8)
  • DBV (SOT23-5 和 SOT23-6)
  • DCK (SC70-5 和 SC70-6)
使用指南: PDF | HTML
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計算工具

ANALOG-ENGINEER-CALC — 類比工程師計算機

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
要求
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
PDIP (N) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
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