TLIN2022A-Q1
- AEC-Q100 (grade 1) qualified for automotive applications
- Compliant to LIN 2.0, LIN 2.1, LIN 2.2, LIN 2.2 A and ISO/DIS 17987–4 electrical physical layer (EPL) specification
- Conforms to SAE J2602-1 LIN network for vehicle applications
- Functional Safety-Capable
- Supports 12-V and 24-V battery applications
- LIN transmit data rate up to 20 kbps
- LIN receive data rate up to 100 kbps
- Wide operational supply voltage range from 4 V to 48 V
- Sleep mode: ultra-low current consumption allows wake-up event from:
- LIN bus
- Local wake up through EN
- Power up and power down glitch-free operation on LIN bus and RXD output
- Protection features:
- ±60 V LIN bus fault tolerant
- Undervoltage protection on VSUP
- TXD Dominant time out protection (DTO)
- Thermal shutdown protection
- Unpowered node or ground disconnection failsafe at system level.
- Available in SOIC (14) package and leadless VSON (14) Package with wettable flanks
The TLIN2022A-Q1 is a Dual Local Interconnect Network (LIN) physical layer transceiver with integrated wake-up and protection features, compliant with LIN 2.0, LIN 2.1, LIN 2.2, LIN 2.2A and ISO/DIS 17987–4 standards. LIN is a single wire bidirectional bus typically used for low speed in-vehicle networks using data rates up to 20 kbps. The TLIN2022A-Q1 is designed to support 12-V and 24-V applications with wider operating voltage and additional bus-fault protection.
The LIN receiver supports data rates up to 100 kbps for faster in-line programming. The TLIN2022A-Q1 converts the LIN protocol data stream on the TXD input into a LIN bus signal using a current-limited wave-shaping driver which reduces electromagnetic emissions (EME). The receiver converts the data stream to logic-level signals that are sent to the microprocessor through the open-drain RXD pin. Ultra-low current consumption is possible using the sleep mode which allows wake-up via LIN bus or EN pin.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TLIN2022A-Q1 Dual Local Interconnect Network (LIN) Transceiver with Dominant State Timeout datasheet | PDF | HTML | 2021年 2月 16日 |
Functional safety information | TLIN2022A-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA | PDF | HTML | 2021年 2月 16日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
TLIN2029EVM — 具有顯性狀態逾時功能的故障保護區域互連網路 (LIN) 收發器 EVM
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (D) | 14 | Ultra Librarian |
VSON (DMT) | 14 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。