TLV1822
- Wide 2.4V to 40V supply range
- Rail-to-rail input
- Power-On Reset (POR) for known start-up
- Low input offset voltage 500µV
- 420ns typical propagation delay
- Low quiescent current 5µA per channel
- Low input bias current 150fA
- Push-pull output option (TLV181x)
- Open-drain output option (TLV182x)
- Full -40°C to +125°C temperature range
- 2 kV ESD protection
- Functional Safety-Capable
The TLV181x and TLV182x are a family of 40 volt single, dual and quad channel comparators with multiple output options. The family offers rail-to-rail inputs with push-pull or open-drain output options. The family has an excellent speed-to-power combination with a propagation delay of 420ns with a full supply voltage range of 2.4V to 40V with a quiescent supply current of only 5µA per channel.
All devices include a Power-On Reset (POR) feature. This makes sure the output is in a known state until the minimum supply voltage has been reached before the output responds to the inputs, thus preventing false outputs during system power-up and power-down.
The TLV181x comparators have a push-pull output stage capable of sinking and sourcing milliamps of current when controlling an LED or driving a capacitive load such as a MOSFET gate.
The TLV182x comparators have an open-drain output stage that can be pulled up to 40V independent of comparator supply voltage.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TLV181x and TLV182x Family of 40V Rail-to-Rail Input Comparators with Push-Pull or Open-Drain Output Options datasheet (Rev. D) | PDF | HTML | 2024年 12月 10日 |
Functional safety information | TLV1812, TLV1822 Functional Safety, FIT Rate, Failure Mode Dist, and Pin FMA | PDF | HTML | 2022年 9月 23日 |
設計與開發
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AMP-PDK-EVM — 放大器性能開發套件評估模組
放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件,可測試通用運算放大器 (op amp) 參數,並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項,可滿足封裝需求,使工程師能夠快速評估和驗證裝置性能。
AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝,包括:
- D (SOIC-8 和 SOIC-14)
- PW (TSSOP-14)
- DGK (VSSOP-8)
- DBV (SOT23-5 和 SOT23-6)
- DCK (SC70-5 和 SC70-6)
DIP-ADAPTER-EVM — DIP 轉接器評估模組
Speed up your op amp prototyping and testing with the DIP-Adapter-EVM, which provides a fast, easy and inexpensive way to interface with small, surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them directly to existing circuits.
The (...)
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (D) | 8 | Ultra Librarian |
SOT-23-THN (DDF) | 8 | Ultra Librarian |
TSSOP (PW) | 8 | Ultra Librarian |
VSSOP (DGK) | 8 | Ultra Librarian |
WSON (DSG) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。