TPS2375-1
- Auto-Retry After Current-Limit Fault
- TPS2375-1: IEEE 802.3af Thresholds
- TPS2377-1: Legacy Thresholds
- Fully Supports IEEE 802.3af Specification
- Integrated 0.58-Ω, 100-V, Low-Side Switch
- 15-kV System Level ESD Capable
- Programmable Inrush Current Control
- Fixed 450-mA Current Limit
- Open-Drain, Power-Good Reporting
- Industrial Temperature Range: -40°C to 85°C
- 8-Pin SOIC and TSSOP Packages
- APPLICATIONS
- VoIP Phones
- WLAN Access Points
- Security Cameras
- Internet Appliances
- POS Terminals
These easy-to-use 8-pin integrated circuits contain all of the features needed to develop an IEEE 802.3af-compliant powered device (PD). The TPS2375-1 and TPS2377-1 are second generation PDCs (PD Controllers) featuring a 100-V ratings and true open-drain, power-good function. These devices are auto-retry versions of selected TPS2375 family members. Information on the TPS2375/6/7 devices can be found on the TPS2375/6/7 data sheet (SLVS525A).
In addition to the basic functions of detection, classification, and undervoltage lockout (UVLO), these controllers include an adjustable inrush limiting feature. The TPS2375-1 has 802.3af-compliant UVLO limits, and the TPS2377-1 has legacy UVLO limits.
The TPS2375 family specifications incorporate a voltage offset of 1.5 V between its limits and the IEEE 802.3af specifications to accommodate the required input diode bridges used to make the PD polarity insensitive.
Additional resources can be found on the TI Web site www.ti.com.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | IEEE 802.3af PoE Powered Device Controllers With Auto-Retry datasheet (Rev. A) | 2008年 4月 25日 | |
| Application note | PoE Powered Devices Debug Guidelines | PDF | HTML | 2021年 7月 19日 | |
| Application note | PoE PD Schematic Review Guidelines | PDF | HTML | 2021年 4月 29日 | |
| Application note | Designing an EMI Compliant PoE with Isolated Flyback | 2008年 5月 20日 | ||
| Application note | Practical Guidelines EMI Compliant PoE | 2008年 3月 27日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。
在 PSpice for TI 設計與模擬工具中，您可以搜尋 TI (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TSSOP (PW) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。