TPS3306-Q1
- Qualified for Automotive Applications
- Dual Supervisory Circuits With Power-Fail for DSP and Processor-Based Systems
- Voltage Monitor for Power-Fail or Low-Battery Warning
- Watchdog Timer With 0.8-s Time-Out
- Power-On Reset Generator With Integrated 100-ms Delay Time
- Open-Drain Reset and Power-Fail Output
- Supply Current of 15 µA (Typ)
- Supply Voltage Range . . . 2.7 V to 6 V
- Defined RESET Output From VDD ≥ 1.1 V
- SO-8 Package
- Temperature Range . . . –40°C to 125°C
- Applications Include
- Multivoltage DSPs and Processors
- Portable Battery-Powered Equipment
- Embedded Control Systems
- Intelligent Instruments
- Automotive Systems
The TPS3306 family is a series of supervisory circuits designed for circuit initialization which require two supply voltages, primarily in DSP and processor-based systems.
The product spectrum of the TPS3306-xx is designed for monitoring two independent supply voltages of 3.3 V/1.5 V, 3.3 V/1.8 V, 3.3 V/2 V, 3.3 V/2.5 V, or 3.3 V/5 V.
The various supervisory circuits are designed to monitor the nominal supply voltage, as shown in the following supply-voltage monitoring table.
During power-on, RESET is asserted when the supply voltage VDD becomes higher than 1.1 V. Thereafter, the supervisory circuits monitor the SENSEn inputs and keep RESET active as long as SENSEn remains below the threshold voltage VIT.
An internal timer delays the return of the RESET output to the inactive state (high) to ensure proper system reset. The delay time, td(typ) = 100 ms, starts after SENSE1 and SENSE2 inputs have risen above the threshold voltage VIT. When the voltage at SENSE1 or SENSE2 input drops below the threshold voltage VIT, the output becomes active (low) again.
The integrated power-fail (PFI) comparator with separate open-drain (PFO) output can be used for low-battery detection, power-fail warning, or for monitoring a power supply other than the main supply.
The TPS3306-xx devices integrate a watchdog timer that is periodically triggered by a positive or negative transition of WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval, tt(out) = 0.50 s, RESET becomes active for the time period td. This event also reinitializes the watchdog timer. Leaving WDI unconnected disables the watchdog.
The TPS3306-xx devices are available in standard 8-pin SO packages.
The TPS3306-xxQ family is characterized for operation over a temperature range of –40°C to 125°C.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | Dual Processor Supervisory Circuits With Power-Fail datasheet (Rev. B) | 2008年 4月 30日 | |
| E-book | Voltage Supervisor and Reset ICs: Tips, Tricks and Basics | 2019年 6月 28日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TIDA-01168 — 適用於 12-V/48-V 車用系統的雙向 DC/DC 轉換器參考設計
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點