TPS54372

現行

3-A 主動式匯流排終端/DDR 記憶體 DC/DC 轉換器

產品詳細資料

Vin (min) (V) 3 Vin (max) (V) 6 Vout (max) (V) 6 Features Status Pin Rating Catalog Operating temperature range (°C) -40 to 85 Iq (typ) (mA) 6.2 Product type DDR DDR memory type DDR, DDR2, DDR3
Vin (min) (V) 3 Vin (max) (V) 6 Vout (max) (V) 6 Features Status Pin Rating Catalog Operating temperature range (°C) -40 to 85 Iq (typ) (mA) 6.2 Product type DDR DDR memory type DDR, DDR2, DDR3
HTSSOP (PWP) 20 41.6 mm² 6.5 x 6.4
  • Tracks Externally Applied Reference Voltage
  • 60-m
  • Tracks Externally Applied Reference Voltage
  • 60-m

As a member of the SWIFT™ family of dc/dc regulators, the TPS54372 low-input voltage, high-output current, synchronous-buck PWM converter integrates all required active components. Included on the substrate with the listed features are a true, high performance, voltage error amplifier that enables maximum performance under transient conditions and flexibility in choosing the output filter L and C components; an undervoltage-lockout circuit to prevent start-up until the input voltage reaches 3 V; an internally and externally set slow-start circuit to limit in-rush currents; and a status output to indicate valid operating conditions.

The TPS54372 is available in a thermally enhanced 20-pin TSSOP (PWP) PowerPAD™ package, which eliminates bulky heatsinks. TI provides evaluation modules and the SWIFT™ designer software tool to aid in quickly achieving high-performance power supply designs to meet aggressive equipment development cycles.

As a member of the SWIFT™ family of dc/dc regulators, the TPS54372 low-input voltage, high-output current, synchronous-buck PWM converter integrates all required active components. Included on the substrate with the listed features are a true, high performance, voltage error amplifier that enables maximum performance under transient conditions and flexibility in choosing the output filter L and C components; an undervoltage-lockout circuit to prevent start-up until the input voltage reaches 3 V; an internally and externally set slow-start circuit to limit in-rush currents; and a status output to indicate valid operating conditions.

The TPS54372 is available in a thermally enhanced 20-pin TSSOP (PWP) PowerPAD™ package, which eliminates bulky heatsinks. TI provides evaluation modules and the SWIFT™ designer software tool to aid in quickly achieving high-performance power supply designs to meet aggressive equipment development cycles.

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技術文件

star =TI 所選的此產品重要文件
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類型 標題 日期
* Data sheet 3-A Output Trkg/Termination Synchronous PWM Switcher w/Integrated FETs datasheet (Rev. D) 2005年 2月 15日
Selection guide Power Management Guide 2018 (Rev. R) 2018年 6月 25日
Application note Limitations of Slew Rate on the REFIN Pin of the TPS54X72 Family 2005年 5月 23日
EVM User's guide TPS54372EVM-215 3-Amp DC/DC Converter Evaluation Module 2002年 7月 15日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬型號

TPS54372 PSpice Average Model

SGLM011.ZIP (85 KB) - PSpice Model
模擬型號

TPS54372 TINA-TI Average Reference Design

SGLM028.TSC (1398 KB) - TINA-TI Reference Design
模擬型號

TPS54372 TINA-TI Average Spice Model

SGLM027.ZIP (8 KB) - TINA-TI Spice Model
Gerber 檔案

Gerber File for TPS54372EVM

SLVC045.ZIP (110 KB)
封裝 針腳 CAD 符號、佔位空間與 3D 模型
HTSSOP (PWP) 20 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

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