TPS65142
- Integrated Bias and Backlight Power
- 2.3-V to 6-V Input Voltage Range for Bias
- Up to 16.5 V Boost Converter with 1.8-A
Switch Current - 1.2-MHz / 650-kHz Selectable Switching
Frequency - Internal Compensation
- Internal Soft-start at Power on
- Reset Function (XAO Signal)
- Regulated VGH
- Regulated VGL
- Gate Voltage Shaping
- LCD Discharge Function
- Up to 16.5 V Boost Converter with 1.8-A
- 150-mA Unity Gain VCOM Buffer
- 4.5-V to 24-V WLED Backlight Input Range
- Integrated 1.5-A / 40-V MOSFET
- Boost Output Tracks WLED Voltage
- Internal Compensation
- External Current Setting Input
- 6 Current-Sink Channels of 25 mA
- Better than 3% Current Matching
- Up to 1000:1 PWM Dimming Range
- Overvoltage Protection
- Thermal Shutdown
- Undervoltage Lockout
- 32-Pin 6 mm × 3 mm QFN Package
The TPS65142 provides a compact solution to the bias power and the WLED backlight in note-pc TFT-LCD panels. The device features a boost converter, a positive charge pump regulator, and a negative charge pump regulator to power the source drivers and the gate drivers. A 150 mA unity-gain high-speed buffer is offered to drive the VCOM plane. Gate voltage shaping and the LCD discharge function are offered to improve the image quality. A reset function allows a proper reset of the TCON at the power on. The TPS65142 also offers the complete solution to driver up to 6 chains of WLEDs with 1000:1 ratio PWM dimming.
All features are integrated in a compact 6 × 3 mm2 Thin QFN package.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TPS65142 LCD Bias Power Integrated with WLED Backlight Drivers datasheet (Rev. B) | PDF | HTML | 2015年 8月 14日 |
Application note | Basic Calculation of a Boost Converter's Power Stage (Rev. D) | PDF | HTML | 2022年 10月 28日 | |
Application note | Understanding Undervoltage Lockout in Power Devices (Rev. A) | 2018年 9月 19日 | ||
Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 | ||
Application note | Generation of a VCOM buffer input using PWM signal | 2015年 12月 21日 | ||
Application note | TPS65142 Loop Compensation Design Consideration | 2013年 7月 2日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
WQFN (RTG) | 32 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。