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線性與低壓差 (LDO) 穩壓器

TPS73230-EP

現行

強化型產品，具反向電流保護的無電容 NMOS、250-mA 低壓降電壓穩壓器

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產品規格表

TPS73230-EP

現行
產品規格表 立即訂購

產品詳細資料

Output options Fixed Output Iout (max) (A) 0.25 Vin (max) (V) 5.5 Vin (min) (V) 1.7 Vout (max) (V) 3 Vout (min) (V) 3 Fixed output options (V) 3 Rating HiRel Enhanced Product Noise (µVrms) 30 PSRR at 100 KHz (dB) 16 Iq (typ) (mA) 0.4 Thermal resistance θJA (°C/W) 255 Load capacitance (min) (µF) 0 Regulated outputs (#) 1 Features Enable, Reverse Current Protection Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 40 Operating temperature range (°C) -55 to 125
Output options Fixed Output Iout (max) (A) 0.25 Vin (max) (V) 5.5 Vin (min) (V) 1.7 Vout (max) (V) 3 Vout (min) (V) 3 Fixed output options (V) 3 Rating HiRel Enhanced Product Noise (µVrms) 30 PSRR at 100 KHz (dB) 16 Iq (typ) (mA) 0.4 Thermal resistance θJA (°C/W) 255 Load capacitance (min) (µF) 0 Regulated outputs (#) 1 Features Enable, Reverse Current Protection Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 40 Operating temperature range (°C) -55 to 125
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –55° to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product–Change Notification
  • Qualification Pedigree(1)
  • Stable with No Output Capacitor or Any Value or Type of Capacitor
  • Input Voltage Range: 1.7 V to 5.5 V
  • Ultralow Dropout Voltage:
    40 mV Typ at 250 mA
  • Excellent Load Transient Response—with or without Optional Output Capacitor
  • New NMOS Topology Provides Low Reverse Leakage Current
  • Low Noise: 30 µVRMS Typ (10 kHz to 100 kHz)
  • 0.5% Initial Accuracy
  • 1% Overall Accuracy (Line, Load, and Temperature)
  • Less Than 1 µA Max IQ in Shutdown Mode
  • Thermal Shutdown and Specified Min/Max Current Limit Protection
  • Available in Multiple Output Voltage Versions
    • Fixed Outputs of 1.2 V to 5 V
    • Adjustable Outputs from 1.2 V to 5.5 V
    • Custom Outputs Available
  • APPLICATIONS
    • Portable/Battery–Powered Equipment
    • Post–Regulation for Switching Supplies
    • Noise–Sensitive Circuitry such as VCOs
    • Point of Load Regulation for DSPs, FPGAs, ASICs, and Microprocessors

(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

All trademarks are the property of their respective owners
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –55° to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product–Change Notification
  • Qualification Pedigree(1)
  • Stable with No Output Capacitor or Any Value or Type of Capacitor
  • Input Voltage Range: 1.7 V to 5.5 V
  • Ultralow Dropout Voltage:
    40 mV Typ at 250 mA
  • Excellent Load Transient Response—with or without Optional Output Capacitor
  • New NMOS Topology Provides Low Reverse Leakage Current
  • Low Noise: 30 µVRMS Typ (10 kHz to 100 kHz)
  • 0.5% Initial Accuracy
  • 1% Overall Accuracy (Line, Load, and Temperature)
  • Less Than 1 µA Max IQ in Shutdown Mode
  • Thermal Shutdown and Specified Min/Max Current Limit Protection
  • Available in Multiple Output Voltage Versions
    • Fixed Outputs of 1.2 V to 5 V
    • Adjustable Outputs from 1.2 V to 5.5 V
    • Custom Outputs Available
  • APPLICATIONS
    • Portable/Battery–Powered Equipment
    • Post–Regulation for Switching Supplies
    • Noise–Sensitive Circuitry such as VCOs
    • Point of Load Regulation for DSPs, FPGAs, ASICs, and Microprocessors

(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

All trademarks are the property of their respective owners

The TPS732xx family of low–dropout (LDO) voltage regulators uses a new topology: an NMOS pass element in a voltage–follower configuration. This topology is stable using output capacitors with low ESR and even allows operation without a capacitor. It also provides high reverse blockage (low reverse current) and ground pin current that is nearly constant over all values of output current.

The TPS732xx uses an advanced BiCMOS process to yield high precision while delivering low dropout voltages and low ground pin current. Current consumption, when not enabled, is under 1 µA and ideal for portable applications. The low output noise (30 µVRMS with 0.1 µF CNR) is ideal for powering VCOs. These devices are protected by thermal shutdown and foldback current limit.

The TPS732xx family of low–dropout (LDO) voltage regulators uses a new topology: an NMOS pass element in a voltage–follower configuration. This topology is stable using output capacitors with low ESR and even allows operation without a capacitor. It also provides high reverse blockage (low reverse current) and ground pin current that is nearly constant over all values of output current.

The TPS732xx uses an advanced BiCMOS process to yield high precision while delivering low dropout voltages and low ground pin current. Current consumption, when not enabled, is under 1 µA and ideal for portable applications. The low output noise (30 µVRMS with 0.1 µF CNR) is ideal for powering VCOs. These devices are protected by thermal shutdown and foldback current limit.
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類型 標題 日期
* Data sheet Cap-Free NMOS 250mA Lower Dropout Regulator With Reverse Current Protection datasheet 2006年 6月 16日
Application note LDO Noise Demystified (Rev. B) PDF | HTML 2020年 8月 18日
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 2017年 8月 9日

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模擬型號

TPS73230 PSpice Transient Model

SBVM372.ZIP (21 KB) - PSpice Model
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SOT-23 (DBV) 5 Ultra Librarian
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  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
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