TPS7A20U

現行

75mA、超低雜訊、低 IQ 高 PSRR 低壓差 (LDO) 線性穩壓器

產品詳細資料

Output options Fixed Output Iout (max) (A) 0.075 Vin (max) (V) 6 Vin (min) (V) 1.6 Vout (max) (V) 5.5 Vout (min) (V) 0.8 Fixed output options (V) 1.8, 2.5, 3, 3.1, 3.3, 4.1 Rating Catalog Noise (µVrms) 7 PSRR at 100 KHz (dB) 60 Iq (typ) (mA) 0.0065 Thermal resistance θJA (°C/W) 201.4 Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Features Enable, Output discharge Accuracy (%) 1.5 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
Output options Fixed Output Iout (max) (A) 0.075 Vin (max) (V) 6 Vin (min) (V) 1.6 Vout (max) (V) 5.5 Vout (min) (V) 0.8 Fixed output options (V) 1.8, 2.5, 3, 3.1, 3.3, 4.1 Rating Catalog Noise (µVrms) 7 PSRR at 100 KHz (dB) 60 Iq (typ) (mA) 0.0065 Thermal resistance θJA (°C/W) 201.4 Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Features Enable, Output discharge Accuracy (%) 1.5 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
DSBGA (YCK) 4 0.379456 mm² 0.616 x 0.616
  • Low output voltage noise: 7µVRMS
    • No noise-bypass capacitor required
  • High PSRR: 89dB at 1kHz
  • Very low IQ: 6.5µA
  • Input voltage range: 1.6V to 6.0V
  • Output voltage range: 0.8V to 5.5V
  • Output voltage tolerance: ±1.5% (max)
  • Very low dropout:
    • 95mV (max) at 75mA (VOUT = 1.5V to 5.5V)
  • Low inrush current
  • Smart enable pulldown
  • Stable with 1µF minimum ceramic output capacitor
  • 0.616mm × 0.616mm DSBGA package
  • Low output voltage noise: 7µVRMS
    • No noise-bypass capacitor required
  • High PSRR: 89dB at 1kHz
  • Very low IQ: 6.5µA
  • Input voltage range: 1.6V to 6.0V
  • Output voltage range: 0.8V to 5.5V
  • Output voltage tolerance: ±1.5% (max)
  • Very low dropout:
    • 95mV (max) at 75mA (VOUT = 1.5V to 5.5V)
  • Low inrush current
  • Smart enable pulldown
  • Stable with 1µF minimum ceramic output capacitor
  • 0.616mm × 0.616mm DSBGA package

The TPS7A20U is an ultra-small, low-dropout (LDO) linear regulator that sources 75mA of output current. The TPS7A20U is designed to provide low noise, high PSRR, and excellent load and line transient performance. This performance meets the requirements of RF and other sensitive analog circuits. Using innovative design techniques, the TPS7A20U offers ultra-low noise performance without the addition of a noise bypass capacitor. The TPS7A20U also provides the advantage of low quiescent current, which is designed for battery-powered applications. With a 1.6V to 6.0V input voltage range and a 0.8V to 5.5V output range, the TPS7A20U is applicable for a wide variety of applications. The device uses a precision reference circuit to provide a maximum accuracy of 1.5% over load, line, and temperature variations.

The TPS7A20U features an internal soft-start to lower the inrush current, thus minimizing the input voltage drop during start-up. The device is stable with small ceramic capacitors, allowing for a small overall solution size.

The TPS7A20U has a smart enable input circuit with an internally controlled pulldown resistor that keeps the LDO disabled. The LDO remains disabled even when the EN pin is left floating and helps eliminate the external components used to pulldown the EN pin.

The TPS7A20U is an ultra-small, low-dropout (LDO) linear regulator that sources 75mA of output current. The TPS7A20U is designed to provide low noise, high PSRR, and excellent load and line transient performance. This performance meets the requirements of RF and other sensitive analog circuits. Using innovative design techniques, the TPS7A20U offers ultra-low noise performance without the addition of a noise bypass capacitor. The TPS7A20U also provides the advantage of low quiescent current, which is designed for battery-powered applications. With a 1.6V to 6.0V input voltage range and a 0.8V to 5.5V output range, the TPS7A20U is applicable for a wide variety of applications. The device uses a precision reference circuit to provide a maximum accuracy of 1.5% over load, line, and temperature variations.

The TPS7A20U features an internal soft-start to lower the inrush current, thus minimizing the input voltage drop during start-up. The device is stable with small ceramic capacitors, allowing for a small overall solution size.

The TPS7A20U has a smart enable input circuit with an internally controlled pulldown resistor that keeps the LDO disabled. The LDO remains disabled even when the EN pin is left floating and helps eliminate the external components used to pulldown the EN pin.

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* Data sheet TPS7A20U 75mA, Low-Noise, Low-IQ, High-PSRR LDO datasheet (Rev. A) PDF | HTML 2024年 9月 25日

設計與開發

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開發板

MULTIPKGLDOEVM-823 — 支援 DBV、DRB、DRV 和 DQN 封裝的通用 LDO 線性穩壓器評估模組

MULTIPKGLDOEVM-823 評估模組 (EVM) 可協助您評估多種常用線性穩壓器封裝的運作與性能,以了解是否可在電路應用中使用。此特定 EVM 配置具有 DRB、DRV、DQN 和 DBV 元件封裝,能讓您焊接並評估低壓差 (LDO) 穩壓器。

使用指南: PDF
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模擬型號

TPS7A20U PSPICE Model

SBVMA05.ZIP (97 KB) - PSpice Model
封裝 針腳 CAD 符號、佔位空間與 3D 模型
DSBGA (YCK) 4 Ultra Librarian

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