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線性與低壓差 (LDO) 穩壓器

TPS7A3001-EP

現行

強化型產品、負 VIN、200-mA、超低雜訊、高 PSRR、LDO 穩壓器

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產品規格表

TPS7A3001-EP

現行
產品規格表 立即訂購

產品詳細資料

Output options Adjustable Output Iout (max) (A) 0.2 Vin (max) (V) -3 Vin (min) (V) -36 Vout (max) (V) -1.2 Vout (min) (V) -33 Fixed output options (V) 0 Rating HiRel Enhanced Product Noise (µVrms) 15 PSRR at 100 KHz (dB) 55 Iq (typ) (mA) 0.05 Thermal resistance θJA (°C/W) 69.3 Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Features Enable, Soft start Accuracy (%) 2.5 Dropout voltage (Vdo) (typ) (mV) 216 Operating temperature range (°C) -55 to 125
Output options Adjustable Output Iout (max) (A) 0.2 Vin (max) (V) -3 Vin (min) (V) -36 Vout (max) (V) -1.2 Vout (min) (V) -33 Fixed output options (V) 0 Rating HiRel Enhanced Product Noise (µVrms) 15 PSRR at 100 KHz (dB) 55 Iq (typ) (mA) 0.05 Thermal resistance θJA (°C/W) 69.3 Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Features Enable, Soft start Accuracy (%) 2.5 Dropout voltage (Vdo) (typ) (mV) 216 Operating temperature range (°C) -55 to 125
HVSSOP (DGN) 8 14.7 mm² 3 x 4.9
  • Input Voltage Range: –3V to –36V
  • Noise:
    • 14µVRMS (20Hz to 20kHz)
    • 15.1µVRMS (10Hz to 100kHz)
  • Power-Supply Ripple Rejection:
    • 72dB (120Hz)
    • ≥ 55dB (10Hz to 700kHz)
  • Adjustable Output: –1.18V to –35V
  • Maximum Output Current: 200mA
  • Dropout Voltage: 216mV at 100mA
  • Stable with Ceramic Capacitors ≥ 2.2µF
  • CMOS Logic-Level-Compatible Enable Pin
  • Built-In, Fixed, Current-Limit and Thermal Shutdown Protection
  • Available in High Thermal Performance MSOP-8 PowerPAD Package
  • Input Voltage Range: –3V to –36V
  • Noise:
    • 14µVRMS (20Hz to 20kHz)
    • 15.1µVRMS (10Hz to 100kHz)
  • Power-Supply Ripple Rejection:
    • 72dB (120Hz)
    • ≥ 55dB (10Hz to 700kHz)
  • Adjustable Output: –1.18V to –35V
  • Maximum Output Current: 200mA
  • Dropout Voltage: 216mV at 100mA
  • Stable with Ceramic Capacitors ≥ 2.2µF
  • CMOS Logic-Level-Compatible Enable Pin
  • Built-In, Fixed, Current-Limit and Thermal Shutdown Protection
  • Available in High Thermal Performance MSOP-8 PowerPAD Package

The TPS7A3001 is a negative, high-voltage (–36V), ultralow-noise (15.1µVRMS, 72dB PSRR) linear regulator capable of sourcing a maximum load of 200mA.

These linear regulators include a CMOS logic-level-compatible enable pin and capacitor-programmable soft-start function that allows for customized power-management schemes. Other features available include built-in current limit and thermal shutdown protection to safeguard the device and system during fault conditions.

The TPS7A3001 is designed using bipolar technology, and is ideal for high-accuracy, high-precision instrumentation applications where clean voltage rails are critical to maximize system performance. This design makes it an excellent choice to power operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.

In addition, the TPS7A3001 of linear regulators is suitable for post dc/dc converter regulation. By filtering out the output voltage ripple inherent to dc/dc switching conversion, maximum system performance is provided in sensitive instrumentation, test and measurement, audio, and RF applications.

For applications where positive and negative high-performance rails are required, consider TI’s TPS7A49xx family of positive high-voltage, ultralow-noise linear regulators.

The TPS7A3001 is a negative, high-voltage (–36V), ultralow-noise (15.1µVRMS, 72dB PSRR) linear regulator capable of sourcing a maximum load of 200mA.

These linear regulators include a CMOS logic-level-compatible enable pin and capacitor-programmable soft-start function that allows for customized power-management schemes. Other features available include built-in current limit and thermal shutdown protection to safeguard the device and system during fault conditions.

The TPS7A3001 is designed using bipolar technology, and is ideal for high-accuracy, high-precision instrumentation applications where clean voltage rails are critical to maximize system performance. This design makes it an excellent choice to power operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.

In addition, the TPS7A3001 of linear regulators is suitable for post dc/dc converter regulation. By filtering out the output voltage ripple inherent to dc/dc switching conversion, maximum system performance is provided in sensitive instrumentation, test and measurement, audio, and RF applications.

For applications where positive and negative high-performance rails are required, consider TI’s TPS7A49xx family of positive high-voltage, ultralow-noise linear regulators.
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類型 標題 日期
* Data sheet Ultra Low Noise Negative Linear Regulator datasheet 2011年 10月 20日
* VID TPS7A3001-EP VID V6211619 2016年 6月 21日
* Radiation & reliability report TPS7A3001MDGNTEP Reliability Report 2015年 2月 6日
White paper Parallel LDO Architecture Design Using Ballast Resistors PDF | HTML 2022年 12月 14日
White paper Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast PDF | HTML 2022年 12月 13日
Application note A Topical Index of TI LDO Application Notes (Rev. F) 2019年 6月 27日

設計與開發

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開發板

TPS7A30-49EVM-567 — TPS7A3001 和 TPS7A4901 低壓差 (LDO) 線性穩壓器評估模組

The TPS7A30-49EVM-567 is a fully assembled and tested circuit for evaluating the TPS7A3001 and TPS7A4901 low-dropout linear regulators in the DGN (3mm x 5mm MSOP-8) package. The TPS7A30-49EVM-567 includes two independent circuits with outputs of –15 V and +15 V (respectively). These (...)
使用指南: PDF
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模擬型號

TPS7A3001 PSpice Transient Model (Rev. A)

SBVM023A.ZIP (50 KB) - PSpice Model
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模擬型號

TPS7A3001 TINA-TI Transient Reference Design (Rev. A)

SBVM215A.TSC (107 KB) - TINA-TI Reference Design
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模擬型號

TPS7A3001 TINA-TI Transient Spice Model (Rev. A)

SBVM214A.ZIP (13 KB) - TINA-TI Spice Model
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模擬型號

TPS7A3001 Unencrypted PSpice Transient Model

SBVM664.ZIP (2 KB) - PSpice Model
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參考設計

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Design guide: PDF
電路圖: PDF
參考設計

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This reference design for high performance data acquisition (DAQ) systems optimizes power stage in order to reduce power consumption and minimize the effect of EMI from switching regulator by using LMS3635-Q1 buck converter.  This reference designs yields 7.2% efficiency improvement at most (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01054 — 用於消除高效能 DAQ 系統中的 EMI 影響的多軌電源參考設計

The TIDA-01054 reference design helps eliminate the performance degrading effects of EMI on Data Acquisition (DAQ) systems greater than 16 bits with the help of the LM53635 buck converter. The buck converter enables the designer to place power solutions close to the signal path without the (...)
Design guide: PDF
電路圖: PDF
參考設計

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The TIDA-01055 reference design for high performance DAQ Systems optimizes the ADC reference buffer to improve SNR performance and reduce power consumption with the TI OPA837 high-speed op amp. This device is used in a composite buffer configuration and provides a 22% power improvement over (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01057 — 將真正 10Vpp 差分輸入的訊號動態範圍最大化至 20 位元 ADC 的參考設計

This reference design is designed for high performance data acquisition(DAQ) systems to improve the dynamic range of 20 bit differential input ADCs. Many DAQ systems require the measurement capability at a wide FSR (Full Scale Range) in order to obtain sufficient signal dynamic range. Many earlier (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01051 — 針對自動測試設備最佳化 FPGA 利用率和數據處理能力的參考設計

The TIDA-01051 reference design is used to demonstrate optimized channel density, integration, power consumption, clock distribution and signal chain performance of very high channel count data acquisition (DAQ) systems such as those used in automatic test equipment (ATE). Using serializers, such (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00738 — 採用分流器且適用於保護繼電器的擴展式電流和電壓量測參考設計

This reference design demonstrates a unique approach for extending current measurement range using a single shunt and voltage measurement AMC1304Mx5 isolated delta-sigma (ΔΣ) modulator. With careful selection of a low-value shunt resistor that minimizes power dissipation, a (...)
使用指南: PDF
電路圖: PDF
參考設計

TIDA-01050 — 適用於 18 位元 SAR 資料轉換器的最佳化類比前端 DAQ 系統參考設計

The TIDA-01050 reference design aims to improve the integration, power consumption, performance, and clocking issues typically associated with automatic test equipment. This design is applicable to any ATE system but most applicable to systems requiring a large number of input channels.
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01052 — 使用負電源輸入改進全幅 THD 的 ADC 驅動器參考設計

The TIDA-01052 reference design aims to highlight system performance increases seen using a negative voltage rail on the analog front end driver amplifiers rather than ground. This concept is relative to all analog front ends, however this design is aimed specifically at automatic test equipment.
Design guide: PDF
電路圖: PDF
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