產品規格表
TRSF3232E
- Operates with 3-V to 5.5-V VCC supply
- Operates up to 1 Mbit/s
- Low supply current: 300 µA typical
- External capacitors: 4 × 0.1 µF
- Accept 5-V logic input with 3.3-V supply
- Latch-up performance exceeds 100 mA Per JESD 78, class II
- ESD protection for RS-232 pins
- ±15-kV Human-Body Model (HBM)
- ±15-kV IEC 61000-4-2 air-gap discharge
- ±8-kV IEC 61000-4-2 contact discharge
- Available in near chip scale QFN (3mmx3mm) package (85% smaller than SOIC-16)
The TRSF3232E consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). This device provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The TRSF3232E operates at data signaling rates up to 1 Mbit/s and a driver output slew rate of 14 V/µs to 150 V/µs.
技術文件
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檢視所有 8 類型 | 標題 | 日期 | ||
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* | Data sheet | TRSF3232E 3-V TO 5.5-V Two-Channel RS-232 1-Mbit/s Line Driver and Recieverwith ±15-kV IEC ESD Protection in Small Package datasheet (Rev. B) | PDF | HTML | 2021年 6月 22日 |
EVM User's guide | TRS3232RGT EVM User's Guide | PDF | HTML | 2020年 4月 17日 | |
Application note | AN-438 Low Power RS-232C Driver and Receiver in CMOS (Rev. B) | 2013年 4月 26日 | ||
Application note | Understanding Power Requirements in RS-232 Applications (Rev. B) | 2013年 4月 26日 | ||
Application note | Removing Ground Noise in Data Transmission Systems | 2007年 10月 5日 | ||
More literature | RS-232 IEC ESD-Protected Devices From TI (Rev. A) | 2007年 7月 27日 | ||
Application note | Interface Circuits for TIA/EIA-232-F (Rev. A) | 2002年 9月 19日 | ||
Application note | Low-Voltage, Single-Supply 232-Standard Interface Solutions (Rev. A) | 2000年 9月 19日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
開發板
TRS3232RGTEVM — 具有 ESD 保護功能的 TRS3232EIRGT 多通道 RS-232 線路驅動器/接收器評估模組
This evaluation module is used to evaluate the TRS3232E with RGT package. All signals are available through headers and test points. The charge pump output V+ and V- are accessible too. The board interfaces data and control CMOS logic levels on the terminal block to RS-232 levels supporting data (...)
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
參考設計
TIDA-060008 — 用於將 RS-232 訊號轉換爲 RS-485 訊號的參考設計
This reference design provides a circuit of converting RS-232 signaling to RS-485 signaling. This allows for long-distance communication, since the range supported by RS-232 is normally less than 50 feet while the range for RS-485's can exceed 1000 feet. The design implements bidirectional (...)
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (D) | 16 | Ultra Librarian |
SOIC (DW) | 16 | Ultra Librarian |
SSOP (DB) | 16 | Ultra Librarian |
TSSOP (PW) | 16 | Ultra Librarian |
VQFN (RGT) | 16 | Ultra Librarian |
訂購與品質
內含資訊:
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊:
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。