TXU0202
- Fully configurable dual-rail design allows each port to operate from 1.1 V to 5.5 V
- Up to 200 Mbps support for 3.3 V to 5.0 V
- Schmitt-trigger inputs allows for slow and noisy inputs
- Inputs with integrated static pull-down resistors prevent channels from floating
- High drive strength (up to 12 mA at 5 V)
- Low power consumption
- 2.5 µA maximum (25°C)
- 6 µA maximum (–40°C to 125°C)
- VCC isolation and VCC disconnect (Ioff-float) feature
- If either VCC input is <100 mV or disconnected, all outputs are disabled and become high-impedance
- Ioff supports partial-power-down mode operation
- Control logic (OE) with VCC(MIN) circuitry allows for control from either A or B port
- Pinout compatible with TXB family level shifters
- Available in another variant that supports common applications: TXU0102
- Operating temperature from –40°C to +125°C
- Latch-up performance exceeds 100 mA per JESD 78, class II
- ESD protection exceeds JESD 22
- 2500-V human-body model
- 1500-V charged-device model
TXU0202 is a 2-bit, dual-supply noninverting fixed direction voltage level translation device. Ax pins are referenced to VCCA logic level, OE pin can be referenced to either VCCA or VCCB logic levels, and Bx pins are referenced to VCCB logic levels. The A port is able to accept input voltages ranging from 1.1 V to 5.5 V, while the B port can also accept input voltages from 1.1 V to 5.5 V. Fixed direction data transmission can occur from A to B or B to A when OE is set to high in reference to either supply. When OE is set to low, all output pins are in the high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.
技術文件
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檢視所有 7 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TXU0202 Dual-Bit Fixed Direction Voltage-Level Translator with Schmitt-Trigger Inputs and 3-State Outputs datasheet (Rev. A) | PDF | HTML | 2022年 3月 10日 |
| Application note | Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators | PDF | HTML | 2024年 10月 2日 | |
| Application note | Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators | PDF | HTML | 2024年 7月 12日 | |
| Application note | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 2024年 7月 3日 | |
| Application brief | Enabling Power-Efficient FPGA Designs With Level Translation | PDF | HTML | 2024年 4月 30日 | |
| Application brief | Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages | PDF | HTML | 2023年 9月 5日 | |
| Application brief | Enabling Next Generation Wireless Beacons with Level Translation | PDF | HTML | 2022年 4月 14日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
開發板
5-8-LOGIC-EVM — 適用於 5 針腳至 8 針腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模組
靈活的 EVM 旨在支援任何針腳數為 5 至 8 支且採用 DCK、DCT、DCU、DRL 或 DBV 封裝的裝置。
使用指南: PDF
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VSSOP (DCU) | 8 | Ultra Librarian |
| X1QFN (DTT) | 8 | Ultra Librarian |
| X2SON (DTM) | 8 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點