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UCC3946

現行

具有監視計時器的 0°C 至 70°C 微處理器監控器

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產品規格表

UCC3946

現行
產品規格表 立即訂購

產品詳細資料

Number of supplies monitored 1 Threshold voltage 1 (typ) (V) 1.235 Features Overvoltage monitor only, Reset time delay, Timeout watchdog, Watchdog timer Reset threshold accuracy (%) 2 Iq (typ) (mA) 0.01 Output driver type/reset output Active-low, Push-Pull Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Rating Catalog Watchdog timer WDI (s) Programmable Operating temperature range (°C) 0 to 70
Number of supplies monitored 1 Threshold voltage 1 (typ) (V) 1.235 Features Overvoltage monitor only, Reset time delay, Timeout watchdog, Watchdog timer Reset threshold accuracy (%) 2 Iq (typ) (mA) 0.01 Output driver type/reset output Active-low, Push-Pull Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Rating Catalog Watchdog timer WDI (s) Programmable Operating temperature range (°C) 0 to 70
SOIC (D) 8 29.4 mm² 4.9 x 6 TSSOP (PW) 8 19.2 mm² 3 x 6.4
  • Fully Programmable Reset Threshold
  • Fully Programmable Reset Period
  • Fully Programmable Watchdog Period
  • 2% Accurate Reset Threshold
  • Input Voltage Down to 2 V
  • Input 18-µA Maximum Input Current
  • Reset Valid Down to 1 V
  • Fully Programmable Reset Threshold
  • Fully Programmable Reset Period
  • Fully Programmable Watchdog Period
  • 2% Accurate Reset Threshold
  • Input Voltage Down to 2 V
  • Input 18-µA Maximum Input Current
  • Reset Valid Down to 1 V

The UCCx946 is designed to provide accurate microprocessor supervision, including reset and watchdog functions. During power up, the device asserts a reset signal RES with VDD as low as 1 V. The reset signal remains asserted until the VDD voltage rises and remains above the reset threshold for the reset period. Both reset threshold and reset period are programmable by the user.

The UCCx946 is also resistant to glitches on the VDD line. Once RES has been deasserted, any drops below the threshold voltage need to be of certain time duration and voltage magnitude to generate a reset signal. These values are shown in Figure 1. An I/O line of the microprocessor may be tied to the watchdog input (WDI) for watchdog functions. If the I/O line is not toggled within a set watchdog period, programmable by the user, WDO is asserted. The watchdog function is disabled during reset conditions.

The UCCx946 is available in 8-pin SOIC(D), 8-pin PDIP (N) and 8-pin TSSOP(PW) packages to optimize board space.

The UCCx946 is designed to provide accurate microprocessor supervision, including reset and watchdog functions. During power up, the device asserts a reset signal RES with VDD as low as 1 V. The reset signal remains asserted until the VDD voltage rises and remains above the reset threshold for the reset period. Both reset threshold and reset period are programmable by the user.

The UCCx946 is also resistant to glitches on the VDD line. Once RES has been deasserted, any drops below the threshold voltage need to be of certain time duration and voltage magnitude to generate a reset signal. These values are shown in Figure 1. An I/O line of the microprocessor may be tied to the watchdog input (WDI) for watchdog functions. If the I/O line is not toggled within a set watchdog period, programmable by the user, WDO is asserted. The watchdog function is disabled during reset conditions.

The UCCx946 is available in 8-pin SOIC(D), 8-pin PDIP (N) and 8-pin TSSOP(PW) packages to optimize board space.
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類型 標題 日期
* Data sheet Microprocessor Supervisor with Watchdog Timer datasheet (Rev. F) 2007年 11月 21日

訂購與品質

內含資訊：
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊：
  • 晶圓廠位置
  • 組裝地點

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