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Texas Instruments Introduces First Validated 533 MHz Direct Rambus Clock Generator

Offers Lower Power Consumption, Improved Jitter Performance for 533 MHz Consumer and Networking Applications

DALLAS (May 8, 2001) -- The industry's first validated 533 MHz Direct Rambus clock generator (DRCG) that supports 1066 MHz Direct Rambus memory subsystems is now available from Texas Instruments Incorporated (TI) (NYSE: TXN). The high performance clock generator offers lower power consumption and improved jitter performance to meet the needs of communications, consumer and networking applications. (See http://www.ti.com/sc/msp6225u)

"TI's validated 533MHz DRCG supports the evolutionary roadmap of Rambus DRAM," said Ken Hines, business development manager, Network Communications Division, Rambus, Inc. "For the highest performance applications, designers can transition to 1066MHz Rambus DRAM, attaining an impressive 2.1 GB/sec of memory bandwidth from a single memory channel."

The new clock generator, known as CDCFR83, uses TI's low-jitter and analog scalable PLL technology to support operation up to 533 MHz with extremely low jitter. The CDCFR83 provides precise high-frequency clock synchronization and phase alignment to enable communication between the Direct Rambus memory subsystem and ASICs, which include a Rambus interface. The 24-pin CDCFR83 is optimized for applications that use 1066 MHz speed grade RDRAMs.

"As 1066 MHz RDRAM based systems come into the market, TI is ensuring that its customers have the clocking solutions they need to meet the requirements of their target markets," said Raj Gupta, marketing manager, clock driver components, TI. "Our new clock driver family is ideal for communications, consumer and networking applications."

Manufactured using an advanced CMOS process, the CDCFR83 supports operation at multiple frequencies up to 533 MHz. A less expensive part that supports Direct Rambus operation up to 400MHz, the CDCR83, is also available. Both devices are packaged in a 24-pin Shrink Small-Outline Package (SSOP) to enable compact designs. The new clock generator completes TI's DRCG portfolio that also includes the CDCR61A, a 16-pin SSOP designed for graphics cards and the CDCR81, a 300 MHz version of CDCR83.

Availability

TI's CDCFR83 clock generator is sampling now, with volume production scheduled for the second quarter of 2001.

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