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Campus & branch switches

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Block diagram

Campus & branch switches

Block diagram

Overview

Our integrated circuits and reference designs help you create campus and branch switches with higher bandwidth and low power consumption. Use the interactive reference diagram below to design modern, high-speed campus and branch switches to support the connectivity needs of today's Ethernet switch fabric with our power-over-Ethernet (POE), microcontroller, interface, physical interface device (PHY) and power management products.

Design requirements

Modern campus and branch switches require:

  • POE capability to support the latest .bt standard.
  • Multi-gigabit GbE transceivers that provide best-in-class signal integrity.
  • Small footprint with low-power consumption.
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Block diagram

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Campus & branch switches

JTAG JTAG PSE Bias PSE Bias IBV2 IBV2 N+1 PSU N+1 PSU PoE Bus PoE Bus AC/DC AC/DC IBV1 IBV1 Hot Swap & ORing Hot Swap & ORing Bus Converter (Optional) Bus Converter (Optional) eFuse eFuse DC/DC DC/DC POL Power (FPGA, ASIC, Merchant Si, Clocks, etc.) POL Power (FPGA, ASIC, Merchant Si, Clocks, etc.) Converter Converter LDO LDO Multiphase Controller Multiphase Controller Power Stage Power Stage CPU & Memory Power CPU & Memory Power Multiphase Controller Multiphase Controller Power Stage Power Stage Converter Converter DDR Termination DDR Termination Sequencing & Monitoring Sequencing & Monitoring Logic Logic Power On Reset Power On Reset Sequencer Sequencer PoE Control MCU PoE Control MCU MCU MCU DC/DC Converter DC/DC Converter Bidirectional I2C Isolator Bidirectional I2C Isolator Digital Isolator Digital Isolator Clocking Clocking Oscillator Oscillator Clock Buffer Clock Buffer Clock Generator Clock Generator Fan Control Fan Control Hot Swap Controller Hot Swap Controller Fan Controller Fan Controller Temp Sense Temp Sense IO (JTAG, RS232, RS485) IO (JTAG, RS232, RS485) Buffer Buffer JTAG MUX JTAG MUX RS-232 RS-232 RS-485 RS-485 Power Button Switch Power Button Switch Memory Memory DDR DDR Flash Flash SPI MUX SPI MUX Switch Fabric Switch Fabric I2C Level Translator I2C Level Translator I2C Expander I2C Expander Voltage Translator Voltage Translator Latch Latch CPLD CPLD BMC BMC Power On Reset Power On Reset Logic Logic REF REF FPGA FPGA Temp Sense Temp Sense VMon VMon I2C Mux I2C Mux PHY PHY PHY PHY PHY PHY PHY PHY Switch ASIC / Merchant Silicon Switch ASIC / Merchant Silicon Retimer/Redriver Retimer/Redriver CPU CPU CPU CPU I2C Expander I2C Expander I2C Level Translator I2C Level Translator Voltage Translator Voltage Translator Buffer Buffer Retimer/Redriver Retimer/Redriver Uplink (Optical Interface) Uplink (Optical Interface) Optical Module Optical Module Retimer Retimer Hot Swap Hot Swap Power over Ethernet (PoE) Power over Ethernet (PoE) PSE Controller PSE Controller FET FET PSE Controller PSE Controller FET FET I2C Mux I2C Mux LED Driver LED Driver LED Driver LED Driver Shift Register Shift Register Logic Logic USB USB Current Limit Switch Current Limit Switch ESD ESD

Technical documentation

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Type Title Date
Application note How to use the LMK05318 as a jitter cleaner 27 Feb 2019
Application note Glitch free power sequencing with AXC level translators (Rev. A) 20 Sep 2018
Application note Interfacing Between LVPECL, VML, CML and LVDS Levels 16 Dec 2002
Application note Supported synchronization modes for TI network synchronizers (Rev. A) 11 May 2022
Application note DC/DC Point-of-load Power Solutions for Wired Networking Switch Systems 11 May 2022
Application note Understanding clocking needs for high-speed 56G PAM-4 serial links (Rev. A) 11 May 2022
Application note Optimizing Network Switch Designs with Common Logic Use Cases (Rev. A) PDF | HTML 10 May 2022
Analog Design Journal Understanding thermal-resistance specification of DC/DC convert. w/ MOSFETs 08 Jan 2018
White paper Internally compensated advanced current mode (ACM) (Rev. A) 07 Dec 2018
Analog Design Journal Comparing internally-compensated advanced current mode (ACM) w/ D-CAP3™ control (Rev. A) 06 Nov 2018

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