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Multi-access edge computing (MEC)

Products and reference designs
Block diagram

Multi-access edge computing (MEC)

Block diagram

Overview

Our integrated circuits and reference designs help you quickly create multi-access edge computing (MEC) designs with higher energy efficiency, density and fast data computing. Our power management and signal chain ICs support the need to improve 5G network latency performance as well as emerging technologies like artificial intelligence and machine learning.

Design requirements

MEC systems require:

  • High DC/DC power conversion and protection.
  • Increased density to meet standard rack and open compute project (OCP) rack size requirements.
  • High-bandwidth data throughputs requiring leading-edge signal processing.
Explore applications similar in function and design

Block diagram

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Multi-access edge computing (MEC)

-48V -48V Hardware accelerator card Hardware accelerator card NIC card NIC card IBV1 IBV1 PCIe PCIe PCIe PCIe IBV1 IBV1 JTAG JTAG Communication interfaces / IO Communication interfaces / IO USB redrivers USB redrivers USB hub USB hub RS-232, RS-485 RS-232,RS-485 UART UART Video, SPI mux Video, SPI mux SAS/SATA redriver SAS/SATA redriver ADC ADC Ethernet interface Ethernet interface Ethernet, retimers, redrivers, port controllers Ethernet, retimers, redrivers, port controllers Ethernet PHY Ethernet PHY Logic & control Logic & control Comparators Comparators Buffer Buffer Switches/MUX Switches/MUX Level shifter Level shifter Logic gate Logic gate Op amp Opamp Clocking Clocking Oscillator Oscillator Clock buffer Clock buffer Clock generator Clock generator CPU & digital processing CPU & digital processing CPU0 CPU0 CPU1 CPU1 DDR DIMM modules DDR DIMM modules DDR DIMM modules DDR DIMM modules PCH PCH Retimers, redrivers Retimers, redrivers PCI/PCIe PHY, bridges PCI/PCIe PHY, bridges BMC BMC Flash Flash I2C functions I2C functions GPIO Expander GPIO Expander Sensing Sensing Temperature sensing Temperature sensing Current sense / power monitoring Current sense / power monitoring Protection Protection Hot swap Hot swap Load switch Load switch ESD ESD FETs FETs Standby eFuse Standby eFuse N+1 PSU N+1 PSU DC/DC DC/DC IBV1 IBV1 AC/DC AC/DC IBV1 IBV1 POL power (FPGA, ASIC, merchant Si, clocks, etc.) POL power (FPGA, ASIC, merchant Si, clocks, etc.) Converter Converter LDO LDO Multiphase controller Multiphase controller Power stage Power stage CPU & memory power CPU & memory power Multiphase controller Multiphase controller Power stage Power stage Converter Converter DDR termination DDR termination Sequencing & monitoring Sequencing & monitoring Power on reset Power on reset Sequencer Sequencer CPLD CPLD

Technical documentation

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Type Title Date
Technical article Powering Intel’s Xeon D SoC in servers, storage and switches PDF | HTML 14 Sep 2023
White paper Analog advancements make waves in 5G communications 12 Aug 2016
Application note TI Network Synchronizer Clock Value Adds in Communications and Industrial Applic 12 Apr 2018
Analog Design Journal Understanding thermal-resistance specification of DC/DC convert. w/ MOSFETs 08 Jan 2018
White paper Internally compensated advanced current mode (ACM) (Rev. A) 07 Dec 2018
Analog Design Journal Comparing internally-compensated advanced current mode (ACM) w/ D-CAP3™ control (Rev. A) 06 Nov 2018
Application note Advanced Linear Repeater Used in PCIe 3.0 Add-in Card Compliance Environment 03 Oct 2014
Application note Achieve 20-A Circuit Protection and Space Efficiency Using Paralleled eFuses 03 Nov 2016
User guide SigCon Architect: Installation and Starter’s Guide (Rev. A) 03 Jun 2016
Analog Design Journal The intricacies of signal integrity in high-speed communications 02 May 2016

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