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The AFE8000 evaluation module (EVM) is an RF-sampling transceiver platform that can be simultaneously configured to support up to eight-transmit ten-receive (8T10R) channels. AFE8000EVM evaluates the AFE8000, which belongs to a family of octal-channel, RF-sampling, analog front ends (AFEs) with 14-bit, 12-GSPS digital-to-analog converters (DACs), 14-bit, 4-GSPS analog-to-digital converters (ADCs), and an on-chip integrated phased-locked loop/voltage-controlled oscillator (PLL/VCO) for high-frequency clock generation in DACs and ADCs.
AFE8000EVM has the option to use dual digital up and down converters in each channel to simultaneously synthesize and digitize multiple wideband signals with high dynamic range. An on-chip integrated digital step attenuator (DSA) for the receiver channels and DSA functionality for the transmitter channels is supported. Eight JESD204B/C-compatible serializer/deserializer (SerDes) transceivers running up to 32.5 Gbps can be used for providing inputs and outputs to and from the AFE8000 through the onboard FPGA mezzanine card (FMC) connector.
AFE8000EVM includes the LMK04828 clock generator for providing a reference signal to the AFE on-chip PLL and for generating the required system reference (SYSREF) signals for the JESD204B/C protocol. Also included is the option for providing an ultra-low-phase noise external clocking solution.
AFE8000EVM implements an efficient power-management solution for the required power rails to the AFE. The design interfaces with the TI pattern/capture card solution (TSW14J58EVM, sold separately), as well as many FPGA development kits.
EVM user's guide, design files, software and other support information are available. Request now
Type | Title | Date | ||
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Certificate | AFE8000EVM EU RoHS Declaration of Conformity (DoC) | 30 Nov 2022 |
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