CDCM9102EVM is the evaluation module for CDCM9102, a low-jitter clock generator designed to provide reference clocks for communications standards such as PCI Express. The device is easy to configure and use. The CDCM9102 provides two 100-MHz differential clock ports. The output types supported for these ports include LVPECL, LVDS, or a pair of LVCMOS buffers. HCSL signaling is supported using an ac-coupled network. The user configures the output buffer type desired by strapping device pins. Additionally, a single-ended 25-MHz clock output port is provided. Uses for this port include general-purpose clocking, clocking Ethernet PHYs, or providing a reference clock for additional clock generators. All clocks generated are derived from a single external 25-MHz crystal. This fully-assembled and factory-tested evaluation board allows complete validation of all device functions.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | EVM User's guide | CDCM9102EVM Evaluation Module | 27 Feb 2012 | |
| Certificate | CDCM9102EVM EU Declaration of Conformity (DoC) | 02 Jan 2019 |
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