Internet Explorer is not a supported browser for TI.com. For the best experience, please use a different browser.
Video Player is loading.
Current Time 0:00
Duration 13:58
Loaded: 0%
Stream Type LIVE
Remaining Time 13:58
 
1x
  • Chapters
  • descriptions off, selected
  • en (Main), selected

Hello, and welcome to Part 3 of the TI Precision Lab series on designing low distortion op amps circuitry. This video focuses on sources of distortion from the op amps internal output stage. Specifically, we will look at how different internal topologies affect distortion, as well as how loading and clipping introduce distortion.

Output stage distortion originates in the final output block of the op amp, highlighted in red in this diagram. Output stages can be categorized into two main configurations. There's the classic class AB output stage, or emitter follower output stage, which is shown here in the upper right hand side. There's also the rail to rail, or common collector configuration, shown on the lower right hand side.

The classic emitter follower configuration is not a rail to rail output stage. The output stage you gain the signal path for this topology is one. There will be a circuit that biases the transistors into class AB operation. The top transistor, shown in red, sources current into the load on the positive half cycle, and the bottom transistor, shown in green, sinks current during the negative half cycle.

The function is similar for the rail to rail common collector output stage. Although now, instead of the emitters being connected to the load, the transistors are flipped and the collectors are connected to the load. The result is that the rail to rail output has gain that depends on the load impedance.

Since the output stage has its own gain, we can plot the gain versus output voltage. We can use this to understand the different regions of output stage operation and how they each produce their own unique type of distortion. The plot shown at right is typically called a wing spread plot. These plots were popularized by the author Douglas Self. See the reference for more information.

The plot shown in this example is a classic emitter follower output. The gain is plotted versus the output voltage of an amplifier on plus minus 15 volt supplies. We notice three different regions noted by the different colors. First are the large signal regions shown in orange. In each of the orange regions, only a single device-- either the top transistor or the bottom transistor-- conducts current to the load.

The next region is the region near either supply, and is shown in red. This is the clipping region. In this region, there is insufficient collector to emitter voltage to sustain the load current. We can see that the output stage gain starts to decrease in the clipping region.

The last region is called the crossover region, and is shown in blue. In this region, either both-- or temporarily, neither-- of the output transistors are conducting current to the load. We can see that this creates a discontinuity in the gain of the output stage near the zero crossing point. All three of these regions create some form of distortion.

In the next slide we will zoom in on the large signal region so that we can see the non-linearity of this part of the curve. The new y-axis range will go from 0.998 to 0.999, instead of 0.95 to 1.05 volts per volt as shown here.

Let's first start with what is commonly called large signal non-linearity. Here, we've zoomed in on the previous plot to take a closer look at the gain characteristic in the orange-colored large signal region. We can now see that the two different large signal regions are actually quite different and are not symmetrical. This is because the NPN and PNP devices are not matched, and each device will have its own unique transfer function. This will cause the positive half cycle and negative half cycle to be non-symmetrical.

This type of distortion will show up as an even harmonic. Consequently, large signal non-linearity from the output stage of an op amp typically generates even harmonics. This plot shows a measured FFT for an OPA 1652 with plus minus 15 volt supplies and a gain of plus 1. The output signal is fairly large at 8.1 volts RMS or 11.5 volts peak. Examining the output FFT, we can see that the second harmonic is by far the largest. This type of result is indicative of large signal output stage distortion. In general, the second harmonic will be the largest, although you may see other even order harmonics as well.

Now, let's switch to another region of operation-- the crossover region. In this region, temporarily both or neither transistor might be conducting current to the load. We can consider that for outputs near zero volts, the load current will switch from one device to the other. So we switch from sourcing current into the load to sinking current out of the load. There will always be a small discontinuity in the output near zero volts, because the hand off of current is never perfect.

After the output moves out of the condition where neither transistor is conducting, the amplifier will move at the slew rate to try to catch up. The bias circuitry is designed to make this hand off region as small as possible, but there is always some region where either neither transistor is conducting, or a worst case scenario, where the output stage is over biased and temporarily both devices are turned on. When both devices are turned on, this is referred to as a shoot through or cross conduction condition.

Crossover distortion is a little counter-intuitive when compared to other types of distortion, and that is because crossover distortion is worse at low output amplitudes. For example, if the output signal is small enough, it might reside entirely in the output crossover region. Also, lower load impedances result in greater current draw from the output BJTs. This causes the beta of the output transistor to droop, which steals current from the class AB bias, and results in a wider crossover region. This is why low-distortion headphone applications are so challenging, because these applications have very small output amplitudes and very low load impedances.

To illustrate this point, we again return to the OPA 1652. The top plot is the one we showed previously. The op amps is in a gain of plus 1 with plus minus 15 volt supplies. The output is providing 2.5 milliamps RMS into a load impedance of 3.24 kiloohms with an output voltage of 8.1 volts RMS. As we mentioned previously, the distortion is dominated by a second harmonic, and the THD in this case is negative 120 dB.

However, if we lower both the output voltage amplitude and the load impedance, keeping the same output current, we get significantly more distortion. Specifically, in this case, we reduce the load resistance to 32.4 ohms and reduce the output signal to 81 millivolts. Note that the load current in both test 1 and test 2 was intentionally kept equivalent to show that these effects are not from the output current. The reason for the significant increase in distortion is because the low level output signal is staying almost entirely in the crossover region.

What about output clipping? We all know that when the output amplitude gets close to either supply rail, the sine wave is squared off. This type of distortion will generate a lot of odd order harmonics. To understand what is happening when the amplifier clips, you must understand that the VCE voltage across the output transistor is the difference between the supply voltage and the output voltage.

Remembering back to the characteristic curves for transistors, they have an active region where the transistor operates like a current source. But this requires a minimum voltage across a transistor, called VCE sat. Below this saturation voltage, the transistor no longer acts like a current source, but rather acts more like a resistor. As the load voltage increases, the VCE of the transistor is decreasing, and eventually the VCE will drop below the VCE sat of the output transistor, and it will no longer act like a current source as desired.

The typical result of this is that the output stage gain decreases, which decreases the open loop gain of the amplifier. This behavior is highlighted in the open loop gain test results. If you need a good indication of what the linear output range of an amplifier is, the best place to look is the data sheet open loop gain test conditions. Typically, open loop gain is specified with an output voltage range and a loading condition.

This example was taken from the OPA 1612 data sheet. We see that with a 10 kiloohm output load, the output can swing within 200 millivolts from other supply rail, while maintaining a typical open loop gain of 130 db down to 114 db. When the output load is decreased to two kiloohms, the output swing must stay at least 600 millivolts from either supply rail to maintain a typical open loop gain of 114 db, down to the minimum of 110 db.

Once the output voltage extends outside of these ranges, the open loop gain will decline. This effect may show up as clipping on an oscilloscope, but will generally show up as distortion harmonics in the frequency domain long before you can see it on an oscilloscope.

Loading the output of an op amp makes all three of these effects worse. The lower the load impedance on the output of an op amp, the worse the distortion is in all three of the regions. So the crossover distortion gets worse, the large signal non-linearity gets worse, and the clipping regions will extend inward.

Looking at the wing spread plot for a high impedance load, such as 100 kiloohms, we can see that the gain of the output stage is essentially one. But as the load impedance is decreased, a few things happen. First, in the large signal region, the gain of the output stage is decreasing. We also notice that the crossover region gets worse, and we can see that on either side of the discontinuity, the slope is increasing. Finally, the clipping region can drastically change, as seen with the 200 ohm load.

This slide shows the OPA 1642's measured THD+N versus frequency results for three different loads. As you would expect, the THD+N is degraded as the load increases. These types of curves will normally be given in a product data sheet, and can be used as a guideline to understand the effects of loading on the distortion. Don't forget that the feedback resistor also constitutes a load.

The short circuit current limit is an internal op amp protection mechanism that prevents damage to the device when low resistance loads are connected to the output. Often, engineers mistakenly believe that the short circuit current limit provides a linear output current range. This is not the case.

This plot compares the distortion for two different devices versus output current. You can see that device B has a much greater short circuit current limit, but begins to show additional distortion at about one milliamp of output current. Device A has a much lower short circuit current limit, but it can deliver more linear output current before the THD+N curve becomes distortion dominated. For example, at 10 milliamps RMS, device A has almost 16 db better THD+N than device B. The main point here is that you cannot equate the short circuit current to a linear output current range.

Some distortion factors have to do with the internal layout of the integrated circuit. One of the key considerations in IC design layout is to pay attention to how the heat is distributed across the die. In particular, the majority of the power dissipated in the device is in the output stage of the amplifier. It's important to make sure that heat from the output stage is distributed symmetrically across the input transistor pairs, so both input devices are affected equally by the temperature shift.

This figure shows the heat map of an integrated circuit with the input stage at the left side and the output stage on the right. In this case, the input pair is not placed along the line of thermal symmetry, so they will be heated asymmetrically. This means that the transistor at the bottom will be heated more than the transistor at the top.

This asymmetrical heating will translate into distortion at low frequencies, because at low frequency, there's enough time for the die to heat up and cool off, and therefore create a thermal gradient across the die.

This slide shows the measure results of a device that has a thermal distortion issue and one that doesn't. Again, notice that this type of distortion happens at low frequencies. From a practical point of view, a board and system level designer only needs to be aware of this issue when selecting their op amp, as they cannot change the internal layout of the op amp. Nevertheless, it is useful to know that low frequency distortion can be caused by this effect.

In summary, here are the guidelines for reducing output stage distortion. First, and perhaps most important, limit the output loading if possible. Remember that the feedback network constitutes a load. Often, engineers choose low-value resistors to minimize noise, but this may inadvertently degrade the THD. This shows that there is a trade off between noise and distortion in op amp design.

Next, if possible, minimize the crossover distortion. This can be done by increasing the output amplitude, but this is usually not an option as the output range is normally set by the application. One possible solution to this is to bias the output stage into class A operation by using a pull up to the supply. When you do this, only one of the transistors conducts current to the load, and you completely avoid the crossover distortion region. Of course, this dramatically increases the power consumption of the output stage, so this method is typically only used in drastic cases.

Next, stay away from clipping regions. This can be done by maximizing the power supply voltages. Also, make sure you understand the linear output range from the open loop gain test conditions in the data sheet.

Finally, composite amplifiers can be a great way to decrease output stage distortion. When you place a buffer in the feedback loop of another amplifier, this increases the amount of loop gain around the output stage.

In summary, this video explained the sources of output stage distortion and discussed methods for minimizing this distortion. Stay tuned for the next video, which discusses external sources of distortion in op amp circuits. Thank you for your time. Please try the quiz to check your understanding of this video's content.

This video is part of a series