Hercules ARM Cortex-R4 System Architecture: System Control Co-Processor (CP15)
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The CP15 and this [INAUDIBLE] system control coprocessor, which has overall system control and configuration. Also has cache configuration and management. Has MPU configuration and management and also has system performance monitoring. Also we need [INAUDIBLE] enable, disable ETC, enable, disable priority. Also some other feature we need to access CP15 when we put up.
CP15 has many register, has system control or configuration, has MPU. This one, we have to use these two instruction to access CP15. Use MRC MCR. M it's move from core processor to register, to CPU register or [INAUDIBLE]. MCR is a move data from CPU register from R to C to CP15. The first one is condition. The second one is CP number. That means CP15 or CP14. Now I'm going to use CP15.
And the second one is [INAUDIBLE] the second column here. Second column is number 0. RT is a CPU register. Can use R0, R1, whatever. So CRN is mean coprocessor register in the first column. C0, C1, C1, C15 just depends on which register you want to access. The CRM, this third column are also [INAUDIBLE] fourth column. We need to use this command, use this register to access different register.
On this one is for cache control and the configuration. For example, for you use RM57 and TMS570 [INAUDIBLE] 43 which are [INAUDIBLE] which has a cache. You need to use cache to disable cache or enable cache. Use configure to [INAUDIBLE]. Also system control and performance monitor.
I will give several example. For this one, the system control register [INAUDIBLE] provide a control and configuration information. For this one, I talk about [INAUDIBLE] interrupt mode configure this one. If you want to use that mode, we need to enable this one in CP15 register and system control record register. [INAUDIBLE] Also non maskable FIQ. Also we need to enable this one. This one, the default is enabled. It's non maskable. Also the endianess is enabled.
Also we need this one we need to enable MPU. We need to determine the location of the vector. The number at the beginning is address [INAUDIBLE]. This address also we need auxiliary control register, which enable disable priority check and an [? ETD ?] check. Also we need to enable this one at boot up.
Also this one. Also the error checking, that SRAM flat ETC and priority checking. We need to enable disable this one. [INAUDIBLE] generate [INAUDIBLE] function is called system core ASM. All this function [INAUDIBLE] enable disable assembly functioning in that file.
This one the data [INAUDIBLE] register. If you have data [INAUDIBLE] error, you can check this register. This one in the status, there will be [INAUDIBLE] combined [INAUDIBLE]. Combine together will check the status. [INAUDIBLE] may show you, OK, the permission and the memory permission [INAUDIBLE] MPU problem and background error or precise or imprecise [INAUDIBLE] many options.
This one is instructive for [INAUDIBLE] register [INAUDIBLE] data has [INAUDIBLE] for status. Yeah, this one is also auxiliary [INAUDIBLE] register. [INAUDIBLE].
For more information, refer to the links shown. For questions about this training, visit the Engineer-2-Engineer support forums for Hercules Safety Microcontrollers at e2e.ti.com. Thank you for taking the time to watch this training.
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