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[DING]

Hello, my name is Yaser Ibrahim. In this video I will cover some of the top issues and considerations to take into account when using M-LVDS in a backplane environment, including some practical design guidelines and tips.

I will start with a quick overview of M-LVDS technology. Then I will talk about stubs, what they are and how to minimize their effect, as well as how to select the characteristic impedance of the backplane interconnect. And finally, I will talk about the use of proper decoupling to reduce power supply nodes.

M-LVDS is an industry standard that builds on the LVDS standard by adding enhancements to support multipoint and multidrop configurations. One of these enhancements is that M-LVDS increases the driver current to 11.3 milliamps. This is needed in order to be able to drive the increased load, which is due to the double termination used in M-LVDS and the loading from the multiple transceivers on the shared bus in multipoint environments.

Another enhancement is that M-LVDS drivers have controlled slew rates which help reduce the effect of impedance discontinuities inherently present in a backplane environment. With these enhancements M-LVDS can support up to 32 transceivers on the bus in total.

Some of the things that we need to watch for when designing M-LVDS in multipoint backplane configurations are stubs which are unterminated transmission lines, capacitive loading from plug-in boards, proper termination valuers, the spacing of the slots on the backplane, and proper PCB decoupling to reduce power supply nodes.

What about stubs? In M-LVDS two terminations are used, one on each end of the bus. The intermediate plug-in boards on the backplane are not terminated. And therefore, they create stubs or unterminated transmission lines. These stubs create impedance mismatches on the bus, which can potentially cause reflections, which in turn degrade the signal integrity and can lead to errors on the communication link.

To minimize the effect of the stubs, they need to be as short as possible. How short do the stubs need to be to limit their effect on signal integrity? This really depends on transition times, the rise and fall times. A general guideline is to keep that propagation delay in a stub to be less than 50% of the transition time. As an example, if the minimum transition time is 1.5 nanoseconds, then the stub length needs to be less than half a nanosecond. FR-4 PCB material has a propagation delay of approximately one nanosecond per six inches, which means that half a nanosecond translates to three inches.

Please keep in mind that this is a maximum value and the shorter the stub length the better. A general recommendation is to keep stubs under one inch in length to maintain good noise margins. Shorting the stub from one inch to half inch increases the noise margin by as much as 50%. Make sure to include the length of the connector in the stub length.

One more thing to watch for in relation to stubs is test points. Any test points on the differential lines will create stubs. And those stubs have to be taken into account and their length need to be minimized.

Loading from plug-in boards lowers the effective characteristic impedance of the bus. This is due to extra capacitance from the stubs, the I/Os of the M-LVDS transceivers, the connectors, the board vias, et cetera. Therefore, the number of characteristic impedance of the backplane traces should be designed to be higher than 100 ohm, so that when the bus is heavily loaded the effective characteristic impedance stays above 80 ohms.

Lab experiments and simulations show that selecting the characteristic impedance to be 130 ohm works well for a heavily loaded backplane. Notice that if the effective characteristic impedance of the bus is not 100 ohm, then the value of the terminations should be selected to match the effective characteristic impedance. This is to minimize impedance mismatch at the terminations and hence reduce reflections.

The plug-in boards should be spaced evenly on the backplane. This helps reduce any irregularities and mismatch. The slot pitch, which is the slot to slot spacing is normally determined from system considerations, such as overall system dimensions and the number of boards supported.

Please notice, however, that the slot pitch affects the effective characteristic impedance of the backplane. A smaller slot pitch leads to higher distributed loading on the backplane and that in turn leads to lower effective characteristic impedance. Lab experiments and simulations suggest that a slot pitch of 0.8 inches or 2 centimeters works well with a designed characteristic impedance of 130 ohm that was mentioned earlier.

Proper decoupling is very important to reduce power supply noise which can lower noise margins. Make sure that each power or ground pin is connected to nearby power or ground plane through low impedance path. Normally this is achieved using vias placed immediately adjacent to the power or ground pin. Place bypass capacitors as close to power pins as possible and use surface mount capacitors that are small in physical size, such as 0402 or 0201 in order to minimize that inductance. Use an array of different capacitor values in parallel to extend the operating frequency range. An even more effective solution for decoupling is to use distributed bypass capacitance built using two layers of power and ground with small separation of 2 to 3 mils.

TI offers a wide range of M-LVDS transceivers that are suitable for different applications. For a full portfolio, please visit TI.com/mlvds. And if you have specific questions about our products please utilize our E2ED forum. Thank you for watching this video.

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