CLLLC resonant dual active bridge for HEV/EV onboard charger
Resources
Hi. Today, I'm going to show you a new reference design we have developed to demonstrate the CLLLC topology, the TIDM-02002. Some of the key technologies from TI we are highlighting in this design are the C2000 F280049 microcontroller, our silicon carbide gate drivers, and digital isolators and amplifiers.
One of the key markets that we are targeting with this design is the EV HEV market, specifically the onboard charging system. Typically, an onboard charger consists of an AC/DC stage and an isolated DC-DC converter. CLLLC is an attractive topology for implementing the isolated DC-DC converter in the onboard charging systems.
It has a symmetric structure that enables bi-directional operation which makes vehicle-to-grid applications possible and soft switching behavior due to resonant mode which reduces power losses and enables power devices to be switched at very high frequencies. This helps in magnetics size reduction and thus increases power density.
In this video, we will look at two of the common challenges you might face in implementing a CLLLC topology. First, generation of accurate high frequency PWMs, and second implementation of active synchronous rectification scheme. Here, I have the board running in the lab with a DC supply connected on the input and a resistive load at the output.
Now, let's look at the first challenge which is generation of accurate PWMs that are needed for the precise resonant tank balance. It is not just precise frequency control that is required, but dead time and duty are equally important. On this design, PWM switching ranges from 300 kilohertz to 700 kilohertz.
Looking at the oscilloscope, which is connected to the PWM pulses on the primary side, we see it sweep cleanly from 300 kilohertz to 700 kilohertz with accurate duty, dead time, and frequency control. Now stopping the sweep, we see jitter free PWM generation at high frequencies, which is possible because of high resolution type 4 PWM on the F280049.
Now let's talk about the second challenge, which is active synchronous rectification. Active synchronous rectification improves efficiency. But challenges such as noise and lack of ultrahigh current bandwidth sensor make it difficult to implement. On this design, we use a Rogowski's coil to sense the high frequency current and use the sense signal to implement the current sensing based active synchronous rectification scheme.
Here on the scope, we see the primary current and the secondary current along with the PWM for the secondary site. Using the active synchronous rectification scheme, the secondary site duty adjusts automatically for the changing current as it goes discontinuous to achieve ideal diode emulation. C2000 MCU features, such as blanking window and flexible trip action on comparator events, help eliminate noise and enable these waveforms to be generated accurately.
Now let's see at how this affects the efficiency. Looking at the power meter that is connected to the design at 2 kilowatt, we are measuring high efficiency of 97%. And this design can achieve a peak efficiency of 98%. For more information on this reference design, please refer to the page ti.colm/tool.tidm-02002. Thanks for watching.
This video is part of a series
-
C2000™ MCUs - Electric vehicle (EV)
video-playlist (7 videos)