Robust design of Delta-Sigma ADC system inputs for EOS immunity – PLC analog input module
00:51:52
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17 DEC 2020
This presentation will explain how to design protection circuitry that will prevent damage to the delta-sigma ADC from large EOS signals with little to no impact on the circuit performance. A detailed, definition-by-example design of a delta-sigma ADC acquisition system will be shown with consideration of application usages, including RTD, TC and voltage/current measurement in analog input module (AI) of programmable logic controller (PLC) and proper selection of external protection circuitry.