Schmitt-trigger CMOS inputs
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Hello and welcome to The Logic Minute. In this video, we will discuss the benefits and operation of the Schmitt-Trigger CMOS input architecture. Almost all logic devices have a similar internal structure with buffered inputs, a logic function, and independent output drivers. In this video, we're going to look at the Schmitt-Trigger CMOS input structure.
To the right is one common design for a CMOS based Schmitt-Trigger input circuit that can be found in many CMOS design textbooks. There are many variations on this circuit design. However, they all work on the same principles, so I will use this one as an example in this video. These inputs have similar benefits to standard CMOS inputs, being voltage controlled, low power, and fast responding.
However, they add the important benefits of noise immunity and tolerance for slow input signal transmissions. Here you can see the input waveform in green and the output waveform in blue. The Schmitt-Trigger architecture forces the rising edge transition voltage, VT plus, to be higher than the falling edge transition voltage, VT minus.
The difference between the two is delta VT, also commonly called the input threshold hysteresis. This difference in thresholds makes the circuit very tolerant to noise that is less than the hysteresis value in magnitude. Although the input signal crosses the threshold several times, the output still only has a single transmission on each edge. Let's look at how this circuit works in detail, using the rising edge as an example.
With the input held at 0 volts, the bottom two input control transistors are forced off, while the top two are on, providing a path for current to the output. The top feedback transistor is off, and the bottom feedback transistor is on. This results in the node labeled end being held at VCC. In the static state, very little current can flow from VCC to ground.
As the input transitions from 0 volts to half of the supply, the bottom transistor will turn on, because its control voltage will exceed its threshold voltage. This will allow some current to flow and produce a voltage divider between the feedback transistor and the bottom control transistor. The feedback node voltage is labeled as VN here.
The second transistor's control voltage, shown here as VGS, is dependent on the feedback node's voltage. The feedback transistor ratio is specially designed to set VN such that VGS will not pass the threshold voltage until the desired positive input threshold is reached.
As the input voltage is increased, the bottom transistor will be turned on more, reducing VN and eventually allowing the second transistor to turn on. Once that positive threshold is reached, the second transistor turns on and the output switches states. This change in output voltage switches the feedback circuits, such that the Nfet is turned off and the Pfet is turned on. This drives node P to ground, and now the device is in the opposite state of where we started.
The feedback circuits are what make the Schmitt-Trigger input architecture so resilient to noise and slow transitioning signals. For the falling edge, the circuit works exactly the same way, just with each MOSFET in the opposite state. Let's look at how an input transition affects the supply current for the device. As the input transitions, there will be some increase in supply current due to the feedback circuitry.
Here, we can see the expected supply current increase as the input is transitioned from 0 volts to VCC. We can see where the current dramatically decreases when the device changes states from a low input to a high input. As the input signal transitions back from VCC to 0 volts, the supply current follows a different curve.
This is because the other feedback circuit is now active, and we can see clearly where that circuit changes states, as the negative input voltage threshold is crossed. Just like with standard CMOS inputs, Schmitt-Trigger inputs will draw some extra supply current when the input is between the two rails.
The key difference is that Schmitt-Trigger inputs are designed to operate with slower noisy inputs, so they will still draw far less power than a standard CMOS input under the same conditions, and it is always safe to hold a Schmitt-Trigger input between the threshold values. If your system has either slow transitioning or noisy digital logic signals, Schmitt-Trigger input devices are a great solution to prevent problems.
Thanks for watching. If you need a Schmitt-Trigger input logic device for your project, visit TI.com/logic to start your search. If you have any technical questions regarding this subject, please come on over to the E2E forums, where you can ask us directly.
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