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Hello, and welcome to I2C Clock Stretching overview video from TI's Precision Labs. This video is going to supplement the existing I2C protocol video and the I2C microcontrollers basic video. In this video, we'll introduce clock stretching and discuss how it's performed and why it's used. Clock stretching is a method for any I2C device to slow down the bus. The I2C clock speed is controlled by the master, but clock stretching allows all devices to slow down or even halt I2C communication.

Clock stretching is performed by holding the SCL line low. While the line is held low, there are no edges on SCL, and therefore, I2C communication is temporarily blocked. Clock stretching is very common, but it is technically an optional feature of the I2C protocol. This means that not every I2C device will support it.

If a device or MCU on your I2C bus will likely need to clock stretch, you must check each device data sheet to confirm that the feature is supported. If it is not supported, then you may need to choose an I2C clock speed slow enough to ensure all devices have enough processing time and won't need to clock stretch the bus.

The I2C bus is open-drain driven with external pull-up resistors. This means that any device, master or slave, can pull the SCL low without causing a drive collision. Clock stretching is used any time a device on the I2C bus needs more time to perform a critical task. It's usually a better solution than just not acknowledging or NACKing. While busy, the request can be serviced as soon as possible, and the I2C commands don't have to be constantly retransmitted.

There are several common scenarios where you will see clock stretching. One is when a master tries to read data from a slave, but the slave needs more time to prepare the data. For example, you could try and read a temperature sensor, but it's in the middle of a conversion. It may clock stretch to finish its conversion and then sent back the data.

Another is when the MCU master is writing data, but its transmit buffer hasn't been filled yet. The master may clock stretch while waiting for its software to catch up and load the next bytes. This can also happen when the master is reading data, and the received buffer hasn't been read yet. Instead of overwriting previously received data, it may clock stretch and halt the bus until the application software has time to read out the data.

There is no defined maximum time limit that the I2C bus can be halted by clock stretching, so it is possible that if an I2C bus fails, it could indefinitely hang the bus. To account for this, a separate timeout should be considered, and if reached, the devices on the I2C bus may need to be reset. It can also be tricky to debug an I2C hang issue since any device on the bus can be the one clock stretching.

The best method to determine which I2C device is failing is to remove devices from the I2C bus one by one. When the SCL line returns high from the external pull-up, it will indicate that the last removed device was pulling the bus low. That concludes the video on I2C clock stretching. Thank you for watching. For more information on I2C, watch the other Precision Labs I2C videos.

This video is part of a series