Automotive load switch deep-dive training
In automotive applications, there are many specific requirements such as ISO transients and qualifications that must be considered when picking a load switch. In this training, we go over the specific requirements that are needed from load switches for automotive applications and how Texas Instruments load switches can be used to simplify an automotive power design.
Resources
[AUDIO LOGO]
Automotive load switches have to go through the AEC-Q100 standard stress test qualifications. You can see some of them at the bottom of the page, along with a few that do not apply, marked in red.
ISO and IEC specifications do not apply to load switches, as the input rail comes from a regulated DC-to-DC converter, and the load is on the same ECU as the load switch.
We'll now go into a specific automotive load switch design for an ADAS driver monitoring system. The supply is a 12-volt lead acid battery to a DC-to-DC buck to a PMIC. The load switch enables the control power rail and the processor for DDR to prevent memory from being cleared, and the supply and load are on the same ECU. There is an AEC-Q100 requirement.
The requirements of DDR is 1.5 volts, maximum current draw of 300 milliamps, and power sequencing, as you can see by the figure on the right. We choose to use TPS22995H-Q1 here based on its input voltage range and its humidity-resistant RT pin.
As you can see, the battery feeds into the buck converter, which powers the PMIC, and then additional TPS22995H-Q1. Each load switch on pins are controlled through either GPIO0 or GPIO4, which could be programmed by the PMIC to enable after the required rails are enabled first. The TPS22995H-Q1 load switch we are going into detail on is powering the processor DDR control power rail.
In the schematic for this design, we have tied the V IN and V BIAS pins together, since they can operate on a 1.5-volt rail from the PMIC's SMPS5, and GPIO4 from the PMIC controls the ON pin of the device.
The bulk capacitance on the input is to help keep the SMPS5 rail from dipping in voltage from other potential rails. However, in this design, the load switch is the only 1.5-volt rail.
The processor of V DVS DDR rail requires bypass capacitors close to the input pin on either the top side or back side of the processor. This must also be factored in into an inrush current calculation.
The layout recommendations are the same as earlier, with 0.5-inch squared V IN and V OUT polygon pours, input and output capacitors as close to the pins as possible [INAUDIBLE] ground pour with ground plane, and the RT resistor placed as close to the RT pin as possible.
Check out our load switch portfolio on ti.com/loadswitches. While you're there, feel free to take a look at our 11 ways to protect your power path, and basic of load switches application reports.
This video is part of a series
-
Load switch deep-dive training
video-playlist (3 videos)