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High-speed ADCs (≥10 MSPS)

ADC12D1620QML-SP

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Radiation-hardness-assured (RHA), QMLV, 300-krad, 12-bit, dual 1.6-GSPS or single 3.2-GSPS ADC

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Data sheet

ADC12D1620QML-SP

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Data sheet Order now

Product details

Sample rate (max) (Msps) 1600, 3200 Resolution (Bits) 12 Number of input channels 1, 2 Interface type Parallel LVDS Analog input BW (MHz) 2400 Features Ultra High Speed Rating Space Peak-to-peak input voltage range (V) 0.8 Power consumption (typ) (mW) 3880 Architecture Folding Interpolating SNR (dB) 59.8 ENOB (bit) 9.5 SFDR (dB) 67.4 Operating temperature range (°C) -55 to 125 Input buffer Yes Radiation, TID (typ) (krad) 300 Radiation, SEL (MeV·cm2/mg) 120
Sample rate (max) (Msps) 1600, 3200 Resolution (Bits) 12 Number of input channels 1, 2 Interface type Parallel LVDS Analog input BW (MHz) 2400 Features Ultra High Speed Rating Space Peak-to-peak input voltage range (V) 0.8 Power consumption (typ) (mW) 3880 Architecture Folding Interpolating SNR (dB) 59.8 ENOB (bit) 9.5 SFDR (dB) 67.4 Operating temperature range (°C) -55 to 125 Input buffer Yes Radiation, TID (typ) (krad) 300 Radiation, SEL (MeV·cm2/mg) 120
CCGA (NAA) 376 780.6436 mm² 27.94 x 27.94 CLGA (FVA) 256 780.6436 mm² 27.94 x 27.94
  • Total ionizing dose (TID) to 300 krad(Si)
  • Single event functional interrupt (SEFI) tested
  • Single event latch-up (SEL) > 120 MeV-cm2/mg
  • Cold sparing capable
  • Wide temperature range –55°C to +125°C
  • Power consumption = 3.8 W or 2.7 W (1600- or 800-MHz clock)
  • 3-dB Input bandwidth = 3 GHz
  • Low-sampling power-saving mode (LSPSM) reduces power consumption and improves performance for fCLK ≤ 800 MHz
  • Auto-sync function for multi-chip systems
  • Time stamp feature to capture external trigger
  • Test patterns at output for system debug
  • 1:1 Non-demuxed or 1:2 or 1:4 parallel demuxed LVDS outputs
  • Single 1.9-V power supply
  • Total ionizing dose (TID) to 300 krad(Si)
  • Single event functional interrupt (SEFI) tested
  • Single event latch-up (SEL) > 120 MeV-cm2/mg
  • Cold sparing capable
  • Wide temperature range –55°C to +125°C
  • Power consumption = 3.8 W or 2.7 W (1600- or 800-MHz clock)
  • 3-dB Input bandwidth = 3 GHz
  • Low-sampling power-saving mode (LSPSM) reduces power consumption and improves performance for fCLK ≤ 800 MHz
  • Auto-sync function for multi-chip systems
  • Time stamp feature to capture external trigger
  • Test patterns at output for system debug
  • 1:1 Non-demuxed or 1:2 or 1:4 parallel demuxed LVDS outputs
  • Single 1.9-V power supply

The ADC12D1620QML uses a package redesign to achieve better ENOB, SNR, and X-talk compared to the ADC12D1600QML. As is its predecessor, the ADC12D1620QML is a low-power, high-performance CMOS analog-to-digital converter (ADC) that digitizes signals at a 12-bit resolution at sampling rates up to 3.2 GSPS in an interleaved mode. It can also be used as a dual-channel ADC for sampling rates up to 1.6 GSPS. For sampling rates below 800 MHz, there is a low-sampling power-saving mode (LSPSM) that reduces power consumption to less than 1.4 W per channel (typical). The ADC can support conversion rates as low as 200 MSPS.

The ADC12D1620QML uses a package redesign to achieve better ENOB, SNR, and X-talk compared to the ADC12D1600QML. As is its predecessor, the ADC12D1620QML is a low-power, high-performance CMOS analog-to-digital converter (ADC) that digitizes signals at a 12-bit resolution at sampling rates up to 3.2 GSPS in an interleaved mode. It can also be used as a dual-channel ADC for sampling rates up to 1.6 GSPS. For sampling rates below 800 MHz, there is a low-sampling power-saving mode (LSPSM) that reduces power consumption to less than 1.4 W per channel (typical). The ADC can support conversion rates as low as 200 MSPS.
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Technical documentation

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Type Title Date
* Data sheet ADC12D1620QML-SP 12-Bit, Single Or Dual, 3200- or 1600-MSPS RF Sampling Analog-to-Digital Converter (ADC) datasheet (Rev. A) PDF | HTML 12 Oct 2021
* SMD ADC12D1620QML-SP SMD ADC12D1620QML-SP SMD 5962-12205 22 Oct 2020
* Radiation & reliability report ADC12D1600QML-SP/ADC12D1620QML-SP Single-Event Effects (SEE) Radiation Report 27 Jul 2020
* Radiation & reliability report ADC12D1600CCMLS TID Report 17 Jan 2013
* Radiation & reliability report Analysis of Low Dose Rate Effects on Parasitic Bipolar Structures in CMOS Proces 04 May 2012
Application brief DLA Approved Optimizations for QML Products PDF | HTML 17 May 2024
White paper Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) PDF | HTML 30 Apr 2024
Selection guide TI Space Products (Rev. J) 12 Feb 2024
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 31 Aug 2023
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 17 Nov 2022
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 19 Oct 2022
Application brief Understanding Op Amp Noise in Audio Circuits PDF | HTML 14 Jun 2021
User guide TSW12D1620EVM-CVAL User's Guide (Rev. A) 29 Jan 2019
User guide ADC1xD1x00CVAL Board User’s Guide 09 Jun 2017

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