GUI for evaluation module (EVM)
Data sheet
ADC3444
- Quad Channel
- 14-Bit Resolution
- Single Supply: 1.8 V
- Serial LVDS Interface
- Flexible Input Clock Buffer With Divide-by-1, -2, -4
- SNR = 72.4 dBFS, SFDR = 87 dBc at
fIN = 70 MHz - Ultra-Low Power Consumption:
- 98 mW/Ch at 125 MSPS
- Channel Isolation: 105 dB
- Internal Dither and Chopper
- Support for Multi-Chip Synchronization
- Pin-to-Pin Compatible With 12-Bit Version
- Package: VQFN-56 (8 mm × 8 mm)
The ADC344x devices are a high-linearity, ultra-low power, quad-channel, 14-bit, 25-MSPS to 125-MSPS, analog-to-digital converter (ADC) family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design while the SYSREF input enables complete system synchronization.
The ADC344x family supports serial low-voltage differential signaling (LVDS) to reduce the number of interface lines, thus allowing for high system integration density. The serial LVDS interface is two-wire, where each ADC data are serialized and output over two LVDS pairs. Optionally, a one-wire serial LVDS interface is available. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 14-bit output data from each channel. In addition to the serial data streams, the frame and bit clocks are transmitted as LVDS outputs.
Technical documentation
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View all 6 | Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | ADC344x Quad-Channel, 14-Bit, 25-MSPS to 125-MSPS, Analog-to-Digital Converters datasheet (Rev. B) | PDF | HTML | 17 Apr 2017 |
| EVM User's guide | ADC3xxxEVM and ADC3xJxxEVM User's Guide (Rev. D) | 24 Aug 2018 | ||
| White paper | Minimum Power Specifications for High-Performance ADC Power-Supply Designs | 31 Mar 2016 | ||
| Technical article | Designing a power supply solution for pipeline ADCs – Part 2 | PDF | HTML | 04 Sep 2015 | |
| Technical article | Designing a power supply solution for pipeline ADCs – Part 1 | PDF | HTML | 03 Sep 2015 | |
| Technical article | How to filter out noise in your DC/DC design | PDF | HTML | 18 Aug 2015 |
Design & development
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Evaluation board
ADC3444EVM — ADC3444 Quad-Channel, 14-Bit, 125-MSPS Analog-to-Digital Converter Evaluation Module
The ADC3444 EVM demonstrates the performance of a low power quad 125Msps 14 bit ADC. It includes the ADC3444 device and TI voltage regulators to provide the necessary voltages. The input for the ADC is connected to a transformer input which can be connected to a 50 ohm single ended signal source. (...)
User guide: PDF
Simulation tool
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| VQFN (RTQ) | 56 | Ultra Librarian |
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