7.3.1 Digital Temperature Sensor

The LM75 is an industry-standard digital temperature sensor with an integrated Sigma-Delta analog-to-digital converter and I²C interface. The LM75 provides 9-bit digital temperature readings with an accuracy of ±2°C from –25°C to 100°C and ±3°C over –55°C to 125°C.

The LM75 operates with a single supply from 2.7 V to 5.5 V. Communication is accomplished over a 2-wire interface which operates up to 400kHz. The LM75 has three address pins, allowing up to eight LM75 devices to operate on the same 2-wire bus. The LM75 has a dedicated over-temperature output (O.S.) with programmable limit and hysteresis. This output has programmable fault tolerance, which allows the user to define the number of consecutive error conditions that must occur before O.S. is activated.

7.5.1 I²C Bus Interface

The LM75 operates as a slave on the I²C bus, so the SCL line is an input (no clock is generated by the LM75) and the SDA line is a bi-directional serial data path. According to I²C bus specifications, the LM75 has a 7-bit slave address. The four most significant bits of the slave address are hard wired inside the LM75 and are “1001”. The three least significant bits of the address are assigned to pins A2–A0, and are set by connecting these pins to ground for a low, (0); or to +V_S for a high, (1).

Therefore, the complete slave address is:

These interrupt mode resets of O.S. occur only when LM75 is read or placed in shutdown. Otherwise, O.S. would remain active indefinitely for any event.

Figure 9. O.S. Output Temperature Response Diagram

7.5.2 Temperature Data Format

Temperature data can be read from the Temperature, T_OS Set Point, and T_HYST Set Point registers; and written to the T_OS Set Point, and T_HYST Set Point registers. Temperature data is represented by a 9-bit, two's complement word with an LSB (Least Significant Bit) equal to 0.5°C:

7.5.3 Shutdown Mode

Shutdown mode is enabled by setting the shutdown bit in the Configuration register via the I²C bus. Shutdown mode reduces power supply current significantly. See specified quiescent current specification in the Temperature-to-Digital Converter Characteristics table. In Interrupt mode O.S. is reset if previously set and is undefined in Comparator mode during shutdown. The I²C interface remains active. Activity on the clock and data lines of the I²C bus may slightly increase shutdown mode quiescent current. T_OS, T_HYST, and Configuration registers can be read from and written to in shutdown mode.

For the LM75B, the TIMEOUT feature is turned off in Shutdown Mode.

7.5.4 Fault Queue

A fault queue of up to 6 faults is provided to prevent false tripping of O.S. when the LM75 is used in noisy environments. The number of faults set in the queue must occur consecutively to set the O.S. output.

7.5.5 Comparator and Interrupt Mode

As indicated in the O.S. Output Temperature Response Diagram, Figure 9, the events that trigger O.S. are identical for either Comparator or Interrupt mode. The most important difference is that in Interrupt mode the O.S. will remain set indefinitely once it has been set. To reset O.S. while in Interrupt mode, perform a read from any register in the LM75.

7.5.6 O.S. Output

The O.S. output is an open-drain output and does not have an internal pull-up. A “high” level will not be observed on this pin until pull-up current is provided from some external source, typically a pull-up resistor. Choice of resistor value depends on many system factors but, in general, the pull-up resistor should be as large as possible. This will minimize any errors due to internal heating of the LM75. The maximum resistance of the pull up, based on LM75 specification for High Level Output Current, to provide a 2V high level, is 30 kΩ.

7.5.7 O.S. Polarity

The O.S. output can be programmed via the configuration register to be either active low (default mode), or active high. In active low mode the O.S. output goes low when triggered exactly as shown on the O.S. Output Temperature Response Diagram, Figure 9. Active high simply inverts the polarity of the O.S. output.

7.5.8 Internal Register Structure

Figure 10. Iternal Register Structure

There are four data registers in the LM75B and LM75C selected by the Pointer register. At power-up the Pointer is set to “000”; the location for the Temperature Register. The Pointer register latches whatever the last location it was set to. In Interrupt Mode, a read from the LM75, or placing the device in shutdown mode, resets the O.S. output. All registers are read and write, except the Temperature register which is a read only.

A write to the LM75 will always include the address byte and the Pointer byte. A write to the Configuration register requires one data byte, and the T_OS and T_HYST registers require two data bytes.

Reading the LM75 can take place either of two ways: If the location latched in the Pointer is correct (most of the time it is expected that the Pointer will point to the Temperature register because it will be the data most frequently read from the LM75), then the read can simply consist of an address byte, followed by retrieving the corresponding number of data bytes. If the Pointer needs to be set, then an address byte, pointer byte, repeat start, and another address byte will accomplish a read.

The first data byte is the most significant byte with most significant bit first, permitting only as much data as necessary to be read to determine temperature condition. For instance, if the first four bits of the temperature data indicates an overtemperature condition, the host processor could immediately take action to remedy the excessive temperatures. At the end of a read, the LM75 can accept either Acknowledge or No Acknowledge from the Master (No Acknowledge is typically used as a signal for the slave that the Master has read its last byte).

An inadvertent 8-bit read from a 16-bit register, with the D7 bit low, can cause the LM75 to stop in a state where the SDA line is held low as shown in Figure 11. This can prevent any further bus communication until at least 9 additional clock cycles have occurred. Alternatively, the master can issue clock cycles until SDA goes high, at which time issuing a “Stop” condition will reset the LM75.

Figure 11. Inadvertent 8-Bit Read from 16-Bit Register where D7 is Zero (“0”)

7.6.1 Pointer Register (Selects Which Registers Will Be Read From or Written to):

P0-P1: Register Select:

P3–P7: Must be kept zero.

7.6.2 Temperature Register (Read Only):

D0–D6: Undefined.    D7–D15: Temperature Data. One LSB = 0.5°C. Two's complement format.

7.6.3 Configuration Register (Read/Write):

Power up default is with all bits “0” (zero).

D0: Shutdown: When set to 1 the LM75 goes to low power shutdown mode.

D1: Comparator/Interrupt mode: 0 is Comparator mode, 1 is Interrupt mode.

D2: O.S. Polarity: 0 is active low, 1 is active high. O.S. is an open-drain output under all conditions.

D3–D4: Fault Queue: Number of faults necessary to detect before setting O.S. output to avoid false tripping due to noise. Faults are determind at the end of a conversion. See specified temperature conversion time in the Temperature-to-Digital Converter Characteristics table.

D5–D7: These bits are used for production testing and must be kept zero for normal operation.

7.6.4 T_HYST and T_OS Register (Read/Write):

D0–D6: Undefined   D7–D15: T_HYST Or T_OS Trip Temperature Data. Power up default is T_OS = 80°C, T_HYST = 75°C