EPIC-IIB is a trademark of Texas Instruments Incorporated.
These octal transparent D-type latches with 3-state outputs are designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
When the latch-enable (LE) input is high, the Q\ outputs follow the complements of the data (D) inputs. When LE is taken low, the Q\ outputs are latched at the inverse of the levels at the D inputs.
A buffered output-enable (
) input can be used to place the eight outputs in either
a normal logic state (high or low logic levels) or a high-impedance
state. In the high-impedance state, the outputs neither load nor
drive the bus lines significantly. The high-impedance state and
increased drive provide the capability to drive bus lines without
need for interface or pullup components.
does not affect
the internal operations of the latches. Previously stored data can be
retained or new data can be entered while the outputs are in the
high-impedance state.
To ensure the high-impedance state during power up or power down,
should be tied
to VCC through a pullup resistor; the minimum value of the
resistor is determined by the current-sinking capability of the
driver.
The SN54ABT533 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT533A is characterized for operation from -40°C to 85°C.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | Octal Transparent D-Type Latches With 3-State Outputs datasheet (Rev. D) | 01 Jan 1997 |
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.