This 20-bit noninverting buffer/driver is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16827 is composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1\ and 1OE2\ or 2OE1\ and 2OE2\) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16827 is characterized for operation from -40°C to 85°C.
This 20-bit noninverting buffer/driver is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16827 is composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1\ and 1OE2\ or 2OE1\ and 2OE2\) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16827 is characterized for operation from -40°C to 85°C.