SBAS672E July   2014  – June 2022 ADC3221 , ADC3222 , ADC3223 , ADC3224

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
    1.     Device Comparison Table
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions (1)
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: General
    6. 6.6  Electrical Characteristics: ADC3221, ADC3222
    7. 6.7  Electrical Characteristics: ADC3223, ADC3224
    8. 6.8  AC Performance: ADC3221
    9. 6.9  AC Performance: ADC3222
    10. 6.10 AC Performance: ADC3223
    11. 6.11 AC Performance: ADC3224
    12. 6.12 Digital Characteristics
    13. 6.13 Timing Requirements: General
    14. 6.14 Timing Requirements: LVDS Output
    15. 6.15 Typical Characteristics: ADC3221
    16. 6.16 Typical Characteristics: ADC3222
    17. 6.17 Typical Characteristics: ADC3223
    18. 6.18 Typical Characteristics: ADC3224
    19. 6.19 Typical Characteristics: Common
    20. 6.20 Typical Characteristics: Contour
  7. 7 Parameter Measurement Information
    1. 7.1 Timing Diagrams
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Inputs
      2. 8.3.2 Clock Input
        1. 8.3.2.1 Using the SYSREF Input
        2. 8.3.2.2 SNR and Clock Jitter
      3. 8.3.3 Digital Output Interface
        1. 8.3.3.1 One-Wire Interface: 12X Serialization
        2. 8.3.3.2 Two-Wire Interface: 6X Serialization
    4. 8.4 Device Functional Modes
      1. 8.4.1 Input Clock Divider
      2. 8.4.2 Chopper Functionality
      3. 8.4.3 Power-Down Control
        1. 8.4.3.1 Improving Wake-Up Time From Global Power-Down
      4. 8.4.4 Internal Dither Algorithm
    5. 8.5 Programming
      1. 8.5.1 Serial Interface
        1. 8.5.1.1 Register Initialization
          1. 8.5.1.1.1 Serial Register Write
          2. 8.5.1.1.2 Serial Register Readout
      2. 8.5.2 Register Initialization through SPI
    6. 8.6 Register Maps
      1. 8.6.1 Summary of Special Mode Registers
      2. 8.6.2 Serial Register Description
        1. 8.6.2.1  Register 01h
        2. 8.6.2.2  Register 03h
        3. 8.6.2.3  Register 04h
        4. 8.6.2.4  Register 05h
        5. 8.6.2.5  Register 06h
        6. 8.6.2.6  Register 07h
        7. 8.6.2.7  Register 09h
        8. 8.6.2.8  Register 0Ah
        9. 8.6.2.9  Register 0Bh
        10. 8.6.2.10 Register 0Eh
        11. 8.6.2.11 Register 0Fh
        12. 8.6.2.12 Register 13h
        13. 8.6.2.13 Register 15h
        14. 8.6.2.14 Register 25h
        15. 8.6.2.15 Register 27h
        16. 8.6.2.16 Register 41Dh
        17. 8.6.2.17 Register 422h
        18. 8.6.2.18 Register 434h
        19. 8.6.2.19 Register 439h
        20. 8.6.2.20 Register 51Dh
        21. 8.6.2.21 Register 522h
        22. 8.6.2.22 Register 534h
        23. 8.6.2.23 Register 539h
        24. 8.6.2.24 Register 608h
        25. 8.6.2.25 Register 70Ah
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Driving Circuit Design: Low Input Frequencies
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Driving Circuit Design: Input Frequencies Between 100 MHz to 230 MHz
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
      3. 9.2.3 Driving Circuit Design: Input Frequencies Greater than 230 MHz
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.16 Typical Characteristics: ADC3222

Typical values are at TA = 25°C, ADC sampling rate = 50 MSPS, 50% clock duty cycle, AVDD = 1.8 V, DVDD = 1.8 V, –1-dBFS differential input, 2-VPP full-scale, 32k-point FFT, chopper disabled, and SNR reported with a 1-MHz offset from dc when chopper is disabled and from fS / 2 when chopper is enabled (unless otherwise noted).

GUID-BB638035-4FA8-4A88-8406-A4B4953B480A-low.gif
SFDR = 88.5 dBc, SFDR = 99.8 dBc (non 23), SNR = 71.1 dBFS, SINAD = 71 dBFS, THD = 88.1 dBc, HD2 = 109.9 dBc, HD3 = 88.5 dBc
Figure 6-31 FFT for 10-MHz Input Signal (Dither On)
GUID-DF9BE126-3840-4042-BCB5-8D2B4CAC1CAC-low.gif
SFDR = 101.6 dBc, SFDR = 100.3 dBc (non 23), SNR = 70.9 dBFS, SINAD = 70.9 dBFS, THD = 98.1 dBc, HD2 = 106.6 dBc, HD3 = 101.6 dBc
Figure 6-33 FFT for 70-MHz Input Signal (Dither On)
GUID-D16C60D5-225D-4546-B1F3-121F22A16F2A-low.gif
SFDR = 85.9 dBc, SFDR = 99.1 dBc (non 23), SNR = 70.4 dBFS, SINAD = 70.2 dBFS, THD = 84.8 dBc, HD2 = 92.7 dBc, HD3 = 85.9 dBc
Figure 6-35 FFT for 170-MHz Input Signal (Dither On)
GUID-06894A7C-14F8-4AE3-B139-22364CED4BE3-low.gif
SFDR = 74.7 dBc, SFDR = 95.2 dBc (non 23), SNR = 69.2 dBFS, SINAD = 68.1 dBFS, THD = 73.7 dBc, HD2 = 74.7 dBc, HD3 = 80.9 dBc
Figure 6-37 FFT for 270-MHz Input Signal (Dither On)
GUID-88213388-0A3B-49AD-BCEE-C1F20E9FE4BB-low.gif
SFDR = 68.2 dBc, SNR = 67.4 dBFS, SINAD = 67.3 dBFS, THD = 86.4 dBc, HD2 = 68.2 dBc, HD3 = 87.3 dBc
Figure 6-39 FFT for 450-MHz Input Signal (Dither On)
GUID-C0202FF1-B7BC-4E6F-BB37-722806A430C3-low.gif
fIN1 = 46 MHz, fIN2 = 50 MHz, IMD3 = 85.4 dBFS, each tone at –7 dBFS
Figure 6-41 FFT for Two-Tone Input Signal (–7 dBFS at 46 MHz and 50 MHz)
GUID-B3BABB56-70E2-44F7-A5A0-C1805DA15936-low.gif
fIN1 = 185 MHz, fIN2 = 190 MHz, IMD3 = 95 dBFS, each tone at –7 dBFS
Figure 6-43 FFT for Two-Tone Input Signal (–7 dBFS at 185 MHz and 190 MHz)
GUID-7536764D-3EFF-47AA-A5E2-F90F92198867-low.gif
Figure 6-45 Intermodulation Distortion vs Input Amplitude (46 MHz and 50 MHz)
GUID-95FD9D20-BD1B-45B1-A90B-47B8DE1AAED6-low.gif
Figure 6-47 Signal-to-Noise Ratio vs Input Frequency
GUID-BBEAAC9A-6CFA-488D-A815-D8897ED65A74-low.gif
Figure 6-49 Performance vs Input Amplitude (30 MHz)
GUID-B3AA2D13-C696-40A8-B6C1-6F1BD93B1EF0-low.gif
Figure 6-51 Performance vs Input Common-Mode Voltage (30 MHz)
GUID-83F1AD79-0BE0-477F-BE49-059175AFE7E8-low.gif
Figure 6-53 Spurious-Free Dynamic Range vs AVDD Supply and Temperature (30 MHz)
GUID-6FDDF48E-3CCB-4FCD-8313-DED1C7B6B762-low.gif
Figure 6-55 Spurious-Free Dynamic Range vs DVDD Supply and Temperature (30 MHz)
GUID-325E40A7-1CFF-4D45-9792-9525A4AAA48F-low.gif
Figure 6-57 Performance vs Differential Clock Amplitude (40 MHz)
GUID-AB7D1CBD-F75F-4669-93FA-2F23AB016F6A-low.gif
Figure 6-59 Performance vs Clock Duty Cycle (30 MHz)
GUID-87BF7A71-C2FF-4C07-9B06-7BF2AE154282-low.gif
SFDR = 84.6 dBc, SFDR = 96.1 dBc (non 23), SNR = 71.4 dBFS, SINAD = 71.1 dBFS, THD = 83.2 dBc, HD2 = 91.6 dBc, HD3 = 84.6 dBc
Figure 6-32 FFT for 10-MHz Input Signal (Dither Off)
GUID-9F69B576-25E0-440F-A528-6EA3FB74A7C3-low.gif
SFDR = 90.2 dBc, SFDR = 94.7 dBc (non 23), SNR = 71.2 dBFS, SINAD = 71.1 dBFS, THD = 86.7 dBc, HD2 = 90.6 dBc, HD3 = 90.2 dBc
Figure 6-34 FFT for 70-MHz Input Signal (Dither Off)
GUID-3493357C-2C09-41BC-9B25-30DB46600D99-low.gif
SFDR = 89.3 dBc, SFDR = 93 dBc (non 23), SNR = 70.7 dBFS, SINAD = 70.6 dBFS, THD = 85.8 dBc, HD2 = 89.3 dBc, HD3 = 111.9 dBc
Figure 6-36 FFT for 170-MHz Input Signal (Dither Off)
GUID-D2CCACA2-1294-47C4-B7DE-FBC7088BDD77-low.gif
SFDR = 74.5 dBc, SFDR = 91.1 dBc (non 23), SNR = 69.4 dBFS, SINAD = 68.1 dBFS, THD = 72.9 dBc, HD2 = 74.5 dBc, HD3 = 78.2 dBc
Figure 6-38 FFT for 270-MHz Input Signal (Dither Off)
GUID-36DF22B4-18CC-4506-9020-452CF64BF549-low.gif
SFDR = 68.1 dBc, SNR = 67.7 dBFS, SINAD = 67.6 dBFS, THD = 86.6 dBc, HD2 = 68.1 dBc, HD3 = 87.3 dBc
Figure 6-40 FFT for 450-MHz Input Signal (Dither Off)
GUID-027857CB-7CC0-41E6-8FBE-FA3B58D9884B-low.gif
fIN1 = 46 MHz, fIN2 = 50 MHz, IMD3 = 103 dBFS, each tone at –36 dBFS
Figure 6-42 FFT for Two-Tone Input Signal (–36 dBFS at 46 MHz and 50 MHz)
GUID-71C3C019-C9BB-4D42-A524-094AD5577488-low.gif
fIN1 = 185 MHz, fIN2 = 190 MHz, IMD3 = 105 dBFS, each tone at –36 dBFS
Figure 6-44 FFT for Two-Tone Input Signal (–36 dBFS at 185 MHz and 190 MHz)
GUID-683F17F2-4686-4710-B0E4-D07FDC6BF41F-low.gif
Figure 6-46 Intermodulation Distortion vs Input Amplitude (185 MHz and 190 MHz)
GUID-CAE5699C-AFE7-4D88-9F6A-008D579BE852-low.gif
Figure 6-48 Spurious-Free Dynamic Range vs Input Frequency
GUID-D3C36377-D689-43F7-9226-20C556E212AC-low.gif
Figure 6-50 Performance vs Input Amplitude (170 MHz)
GUID-9B2F2FD6-2796-46B6-A4E1-2964702C89E8-low.gif
Figure 6-52 Performance vs Input Common-Mode Voltage (170 MHz)
GUID-90C6E282-5E99-42C5-92CE-21ACEFE7AB2A-low.gif
Figure 6-54 Signal-to-Noise Ratio vs AVDD Supply and Temperature (30 MHz)
GUID-9611AE20-4EDB-45E5-814D-89858E735008-low.gif
Figure 6-56 Signal-to-Noise Ratio vs DVDD Supply and Temperature (30 MHz)
GUID-AE8EC569-E036-4F3D-8843-88087470B312-low.gif
Figure 6-58 Performance vs Differential Clock Amplitude (150 MHz)
GUID-DDCCA7AF-11E8-4863-BA17-8BE056B25FF7-low.gif
Figure 6-60 Performance vs Clock Duty Cycle (150 MHz)