SBASAI7 March   2023 ADC34RF52

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics - Power Consumption
    6. 6.6  Electrical Characteristics - DC Specifications
    7. 6.7  Electrical Characteristics - AC Specifications (Dither DISABLED)
    8. 6.8  Electrical Characteristics - AC Specifications (Dither ENABLED)
    9. 6.9  Timing Requirements
    10. 6.10 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Inputs
        1. 7.3.1.1 Input Bandwidth and Full-Scale
        2. 7.3.1.2 Input Imbalance
        3. 7.3.1.3 Overrange Indication
        4. 7.3.1.4 Analog out-of-band dither
      2. 7.3.2 Sampling Clock Input
      3. 7.3.3 SYSREF
        1. 7.3.3.1 SYSREF Capture Detection
      4. 7.3.4 ADC Foreground Calibration
        1. 7.3.4.1 Calibration Control
        2. 7.3.4.2 ADC Switch
        3. 7.3.4.3 Calibration Configuration
      5. 7.3.5 Decimation Filter
        1. 7.3.5.1 Decimation Filter Response
        2. 7.3.5.2 Decimation Filter Configuration
        3. 7.3.5.3 20-bit Output Mode
        4. 7.3.5.4 Numerically Controlled Oscillator (NCO)
        5. 7.3.5.5 NCO Frequency programming using the SPI interface
        6. 7.3.5.6 Fast Frequency Hopping
          1. 7.3.5.6.1 Fast frequency hopping using the GPIO1/2 pins
          2. 7.3.5.6.2 Fast frequency hopping using GPIO1/2, SEN and SDATA pins
          3. 7.3.5.6.3 Fast frequency hopping using the fast SPI
      6. 7.3.6 JESD204B Interface
        1. 7.3.6.1 JESD204B Initial Lane Alignment (ILA)
          1. 7.3.6.1.1 SYNC Signal
        2. 7.3.6.2 JESD204B Frame Assembly
          1. 7.3.6.2.1 JESD204B Frame Assembly in Bypass Mode
          2. 7.3.6.2.2 JESD204B Frame Assembly with Real Decimation - Single Band
          3. 7.3.6.2.3 JESD204B Frame Assembly with Decimation - Single Band
          4. 7.3.6.2.4 JESD204B Frame Assembly with Decimation - Dual Band
        3. 7.3.6.3 SERDES Output MUX
      7. 7.3.7 Test Pattern
        1. 7.3.7.1 Transport Layer
        2. 7.3.7.2 Link Layer
        3. 7.3.7.3 Internal Capture Memory Buffer
    4. 7.4 Device Functional Modes
      1. 7.4.1 Bypass Mode
      2. 7.4.2 Digital Averaging
    5. 7.5 Programming
      1. 7.5.1 GPIO Pin Control
      2. 7.5.2 Configuration using the SPI interface
        1. 7.5.2.1 Register Write
        2. 7.5.2.2 Register Read
    6. 7.6 Register Maps
      1. 7.6.1 Detailed Register Description
  8. 8 Application Information Disclaimer
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Wideband RF Sampling Receiver
      2. 8.2.2 Design Requirements
        1. 8.2.2.1 Input Signal Path
        2. 8.2.2.2 Clocking
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Sampling Clock
      4. 8.2.4 Application Curves
    3. 8.3 Initialization Set Up
      1. 8.3.1 Initial Device Configuration After Power-Up
        1. 8.3.1.1  STEP 1: RESET
        2. 8.3.1.2  STEP 2: Device Configuration
        3. 8.3.1.3  STEP 3: JESD Interface Configuration (1)
        4. 8.3.1.4  STEP 4: SYSREF Synchronization
        5. 8.3.1.5  STEP 5: JESD Interface Configuration (2)
        6. 8.3.1.6  STEP 6: Analog Trim Settings
        7. 8.3.1.7  STEP 7: Calibration Configuration
        8. 8.3.1.8  STEP 8: SYSREF Synchronization
        9. 8.3.1.9  STEP 9: Run Power up Calibration
        10. 8.3.1.10 Step 10: JESD Interface Synchronization
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.10 Typical Characteristics

Typical values are at TA = 25°C, ADC sampling rate = 1.5 GSPS, 50% clock duty cycle, AVDD18 = 1.8 V, AVDD12, CLKVDD, DVDD = 1.2 V and –1-dBFS differential input, Dither = DIS, unless otherwise noted

SNR = 64.5 dBFS, HD23 = 77 dBc, Non HD23 = 84 dBFS
AIN = -1 dBFS, 1x AVG, Dither = DIS
Figure 6-1 Single Tone FFT at FIN = 100 MHz
SNR = 64.4 dBFS, HD23 = 72 dBc, Non HD23 = 81 dBFS
AIN = -1 dBFS, 1x AVG, Dither = DIS
Figure 6-3 Single Tone FFT at FIN = 600 MHz
SNR = 64.3 dBFS, HD23 = 72 dBc, Non HD23 = 84 dBFS
AIN = -1 dBFS, 1x AVG, Dither = DIS
Figure 6-5 Single Tone FFT at FIN = 900 MHz
SNR = 63.8 dBFS, HD23 = 69 dBc, Non HD23 = 80 dBFS
AIN = -1 dBFS, 1x AVG, Dither = DIS
Figure 6-7 Single Tone FFT at FIN = 1400 MHz
SNR = 62.6 dBFS, HD23 = 60 dBc, Non HD23 = 79 dBFS
AIN = -1 dBFS, 1x AVG, Dither = DIS
Figure 6-9 Single Tone FFT at FIN = 1900 MHz
SNR = 66.8 dBFS, HD23 = 67 dBc, Non HD23 = 82 dBFS
AIN = -1 dBFS, 2x AVG, Dither = DIS
Figure 6-11 Single Tone FFT at FIN = 900 MHz
SNR = 65.2 dBFS, HD23 = 64 dBc, Non HD23 = 88 dBFS
AIN = -20 dBFS, 1x AVG, Dither = DIS
Figure 6-13 Single Tone FFT at FIN = 900 MHz
SNR = 67.9 dBFS, HD23 = 64 dBc, Non HD23 = 86 dBFS
AIN = -20 dBFS, 2x AVG, Dither = DIS
Figure 6-15 Single Tone FFT at FIN = 900 MHz
IMD3 = 73 dBc
AIN = -7 dBFS/tone, 1x AVG, Dither = DIS
Figure 6-17 Two Tone FFT at FIN = 900, 1000 MHz
IMD3 = 70 dBc
AIN = -20 dBFS/tone, 1x AVG, Dither = DIS
Figure 6-19 Two Tone FFT at FIN = 900, 1000 MHz
IMD3 = 72 dBc
AIN = -7 dBFS/tone, 2x AVG, Dither = DIS
Figure 6-21 Two Tone FFT at FIN = 900, 1000 MHz
IMD3 = 63 dBc
AIN = -20 dBFS/tone, 2x AVG, Dither = DIS
Figure 6-23 Two Tone FFT at FIN = 900, 1000 MHz
AIN = -1 dBFS, Dither = DIS
Figure 6-25 AC Performance vs FIN
FIN = 900 MHz
Figure 6-27 Dither Spur vs AIN
Dither = DIS
Figure 6-29 AC Performance vs AIN
FIN = 900 MHz, AIN = -1 dBFS, Dither = DIS
Figure 6-31 AC Performance vs FS
Dither = EN
Figure 6-33 IMD3 Performance vs AIN
FIN = 900 MHz, AIN = -1 dBFS, 1x AVG, Dither = DIS
Figure 6-35 AC Performance vs Clock Duty Cycle
FIN = 900 MHz, AIN = -1 dBFS, Dither = DIS
Figure 6-37 AC Performance vs AVDD12
FIN = 900 MHz, AIN = -1 dBFS, Dither = EN
Figure 6-39 AC Performance vs Temperature
FIN = 900 MHz, Dither = DIS
Figure 6-41 DNL vs Code
AIN = -1 dBFS, 1x AVG, Dither = DIS
Figure 6-43 CMRR
AIN = -1 dBFS, 1x AVG
Figure 6-45 Current vs Sampling Rate vs Real Decimation
AIN = -1 dBFS, 1x AVG
Single Band Decimation
Figure 6-47 Current vs Sampling Rate vs Complex Decimation
AIN = -1 dBFS, 1x AVG
Dual Band Decimation
Figure 6-49 Current vs Sampling Rate vs Complex Decimation
AIN = -1 dBFS, Dither DIS
Figure 6-51 Current vs AVDD18
AIN = -1 dBFS, Dither DIS
Figure 6-53 Current vs DVDD
AIN = -1 dBFS
Figure 6-55 AVDD12 Distribution
SNR = 64.3 dBFS(1), HD23 = 76 dBc, Non HD23 = 89 dBFS
AIN = -4 dBFS, 1x AVG, Dither = EN
Figure 6-2 Single Tone FFT at FIN = 100 MHz
SNR = 64.4 dBFS1, HD23 = 75 dBc, Non HD23 = 84 dBFS
AIN = -4 dBFS, 1x AVG, Dither = EN
Figure 6-4 Single Tone FFT at FIN = 600 MHz
SNR = 64.4 dBFS1, HD23 = 76 dBc, Non HD23 = 83 dBFS
AIN = -4 dBFS, 1x AVG, Dither = EN
Figure 6-6 Single Tone FFT at FIN = 900 MHz
SNR = 64.1 dBFS1, HD23 = 71 dBc, Non HD23 = 86 dBFS
AIN = -4 dBFS, 1x AVG, Dither = EN
Figure 6-8 Single Tone FFT at FIN = 1400 MHz
SNR = 63.4 dBFS1, HD23 = 63 dBc, Non HD23 = 89 dBFS
AIN = -4 dBFS, 1x AVG, Dither = EN
Figure 6-10 Single Tone FFT at FIN = 1900 MHz
SNR = 67.0 dBFS1, HD23 = 72 dBc, Non HD23 = 89 dBFS
AIN = -4 dBFS, 2x AVG, Dither = EN
Figure 6-12 Single Tone FFT at FIN = 900 MHz
SNR = 64.8 dBFS1, HD23 = 59 dBc, Non HD23 = 79 dBFS
AIN = -20 dBFS, 1x AVG, Dither = EN
Figure 6-14 Single Tone FFT at FIN = 900 MHz
SNR = 67.6 dBFS1, HD23 = 67 dBc, Non HD23 = 87 dBFS
AIN = -20 dBFS, 2x AVG, Dither = EN
Figure 6-16 Single Tone FFT at FIN = 900 MHz
IMD3 = 75 dBc
AIN = -10 dBFS/tone, 1x AVG, Dither = EN
Figure 6-18 Two Tone FFT at FIN = 900, 1000 MHz
IMD3 = 72 dBc
AIN = -20 dBFS/tone, 1x AVG, Dither = EN
Figure 6-20 Two Tone FFT at FIN = 900, 1000 MHz
IMD3 = 79 dBc
AIN = -10 dBFS/tone, 2x AVG, Dither = EN
Figure 6-22 Two Tone FFT at FIN = 900, 1000 MHz
IMD3 = 77 dBc
AIN = -20 dBFS/tone, 2x AVG, Dither = EN
Figure 6-24 Two Tone FFT at FIN = 900, 1000 MHz
AIN = -4 dBFS, Dither = EN
Figure 6-26 AC Performance vs FIN
AIN = -20 dBFS
Figure 6-28 NSD Performance vs FIN
Dither = EN
Figure 6-30 AC Performance vs AIN
Dither = DIS
Figure 6-32 IMD3 Performance vs AIN
Figure 6-34 Isolation vs Input Frequency
FIN = 900 MHz, AIN = -1 dBFS, Dither = DIS
Figure 6-36 AC Performance vs AVDD18
FIN = 900 MHz, AIN = -1 dBFS, Dither = DIS
Figure 6-38 AC Performance vs Temperature
FIN = 900 MHz, Dither = DIS
Figure 6-40 INL vs Code
Dither = DIS
Figure 6-42 DC Offset Histogram
DDC Bypass
Figure 6-44 Current vs Sampling Rate vs Averaging
AIN = -1 dBFS, 1x AVG
Figure 6-46 Current vs Sampling Rate vs Real Decimation
AIN = -1 dBFS, 1x AVG
Single Band Decimation
Figure 6-48 Current vs Sampling Rate vs Complex Decimation
AIN = -1 dBFS, 1x AVG
Dual Band Decimation
Figure 6-50 Current vs Sampling Rate vs Complex Decimation
AIN = -1 dBFS, Dither DIS
Figure 6-52 Current vs AVDD12
AIN = -1 dBFS, Dither DIS
Figure 6-54 Current vs Temperature
AIN = -1 dBFS
Figure 6-56 DVDD Distribution
1. Measured from 100 MHz to FS/2