ADC34RF52
- 14-Bit, Quad channel 1.5-GSPS ADC
- Noise spectral density:
- -153 dBFS/Hz without averaging
- -156 dBFS/Hz with 2x averaging
- Single core (non-interleaved) ADC architecture
- Aperture jitter: 50 fs
- Low close-in residual phase noise:
- -133 dBc/Hz at 10 kHz offset
- Spectral performance (fIN = 900 MHz, -4 dBFS):
- 2x internal averaging
- SNR: 65.2 dBFS
- SFDR HD2,3: 74 dBc
- SFDR worst spur: 90 dBFS
- Input fullscale: 1.0/1.1Vpp (1/1.8 dBm)
- Full power input bandwidth (-3 dB): 1.6 GHz
- JESD204B serial data interface
- Maximum lane rate: 13 Gbps
- Supports subclass 1 deterministic latency
- Digital down-converters
- Up to two DDC per ADC channel
- Complex output: 4x to 128x decimation
- 48-bit NCO phase coherent frequency hopping
- Fast frequency hopping: < 1 µs
- Power consumption: 0.73 W/channel (1x AVG)
- Power supplies: 1.8 V, 1.2 V
The ADC34RF52 is a single core 14-bit, 1.5-GSPS, quad channel analog to digital converter (ADC) that supports RF sampling with input frequencies up to 2.5 GHz. The design maximizes signal-to-noise ratio (SNR) and delivers a noise spectral density of -153 dBFS/Hz. Using additional internal ADCs along with on-chip signal averaging, the noise density improves to -156 dBFS/Hz.
Each ADC channel can be connected to a dual-band digital down-converter (DDC) using a 48-bit NCO which supports phase coherent frequency hopping. Using the GPIO pins for NCO frequency control, frequency hopping can be achieved in less than 1 µs.
The ADC34RF52 supports the JESD204B serial data interface with subclass 1 deterministic latency using data rates up to 13 Gbps. There are only 2 serdes lanes per ADC channel.
The power efficient ADC architecture consumes 0.73 W/ch at 1.5-GSPS and provides power scaling with lower sampling rates.
Technical documentation
Design & development
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ADC32RF55EVM — ADC32RF55 evaluation module for dual-channel 14-bit 3-GSPS RF-sampling ADC with low NSD
The ADC32RF55 evaluation module (EVM) is a platform for demonstrating the performance of the ADC32RF55 high-speed, JESD204B interface analog-to-digital converter (ADC). Onboard voltage regulation, clocking solution (LMK04832), transformer-coupled analog inputs, and USB interface allow for easy (...)
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
Package | Pins | CAD symbols, footprints & 3D models |
---|---|---|
VQFNP (RTD) | 64 | Ultra Librarian |
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