The following is a step by step programming example to configure the ADC364x to complex decimation by 8 with 1-wire serial CMOS and 16-bit output.
- 0x07 (address) 0x6C (load bit mapper configuration for 16-bit output with 1-wire serial CMOS)
- 0x13 0x01, wait 1 ms, 0x13 0x00 (load e-fuse)
- 0x0A 0xFF, 0x0B 0xEE, 0x0C 0xFD (Power down unused CMOS output buffers to avoid contention)
- 0x18 0x10 (DCLKIN EN for serial CMOS mode)
- 0x19 0x82 (configure FCLK)
- 0x1B 0x88 (select 16-bit output resolution)
- 0x1F 0x50 (DCLKIN EN for serial CMOS mode)
- 0x20 0xFF, 0x21 0xFF, 0x22 0x0F (configure FCLK pattern)
- 0x24 0x06 (enable decimation filter)
- 0x25 0x30 (configure complex decimation by 8)
- 0x2A/B/C/D and 0x31/32/33/34 (program NCO frequency)
- 0x27/0x2E 0x08 (configure Q-delay register bit)
- 0x26 0xAA, 0x26 0x88 (set digital mixer gain to 6-dB and toggle the mixer update)